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@@ -35,9 +35,11 @@
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#undef VGA_DEBUG
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#undef VGA_DUMP_REG
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#ifdef VGA_DEBUG
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-#define PRINTF(fmt,args...) printf (fmt ,##args)
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+#undef _DEBUG
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+#define _DEBUG 1
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#else
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-#define PRINTF(fmt,args...)
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+#undef _DEBUG
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+#define _DEBUG 0
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#endif
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/* Macros */
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@@ -740,7 +742,7 @@ FindAndSetPllParamIntoXrRegs (unsigned int pixelclock,
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}
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m += param->mn_diff;
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n += param->mn_diff;
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- PRINTF ("VCO %d, pd %d, m %d n %d vld %d \n", fvco, pd, m, n, vld);
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+ debug("VCO %d, pd %d, m %d n %d vld %d\n", fvco, pd, m, n, vld);
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xr_cb = ((0x7 & PD) << 4) | (vld == param->vld_set ? 0x04 : 0);
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/* All four of the registers used for dot clock 2 (XRC8 - XRCB) must be
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* written, and in order from XRC8 to XRCB, before the hardware will
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@@ -751,7 +753,7 @@ FindAndSetPllParamIntoXrRegs (unsigned int pixelclock,
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ctWrite_i (CT_XR_O, 0xca, 0); /* because of a hw bug I guess, but we write */
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ctWrite_i (CT_XR_O, 0xcb, xr_cb); /* 0 to it for savety */
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new_pixclock = ReadPixClckFromXrRegsBack (param);
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- PRINTF ("pixelclock.set = %d, pixelclock.real = %d \n",
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+ debug("pixelclock.set = %d, pixelclock.real = %d\n",
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pixelclock, new_pixclock);
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}
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@@ -1119,7 +1121,7 @@ video_hw_init (void)
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pGD->dprBase &= 0xfffff000;
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pGD->dprBase += 0x00001000;
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}
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- PRINTF ("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
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+ debug("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
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PATTERN_ADR);
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pGD->vprBase = pci_mem_base; /* Dummy */
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pGD->cprBase = pci_mem_base; /* Dummy */
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