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@@ -29,24 +29,24 @@
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/* REG_CHARGE */
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/* REG_CHARGE */
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-#define VCHRG0 0
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+#define VCHRG0 (1 << 0)
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#define VCHRG1 (1 << 1)
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#define VCHRG1 (1 << 1)
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#define VCHRG2 (1 << 2)
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#define VCHRG2 (1 << 2)
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#define ICHRG0 (1 << 3)
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#define ICHRG0 (1 << 3)
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#define ICHRG1 (1 << 4)
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#define ICHRG1 (1 << 4)
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#define ICHRG2 (1 << 5)
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#define ICHRG2 (1 << 5)
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#define ICHRG3 (1 << 6)
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#define ICHRG3 (1 << 6)
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-#define ICHRGTR0 (1 << 7)
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-#define ICHRGTR1 (1 << 8)
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-#define ICHRGTR2 (1 << 9)
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+#define TREN (1 << 7)
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+#define ACKLPB (1 << 8)
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+#define THCHKB (1 << 9)
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#define FETOVRD (1 << 10)
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#define FETOVRD (1 << 10)
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#define FETCTRL (1 << 11)
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#define FETCTRL (1 << 11)
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#define RVRSMODE (1 << 13)
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#define RVRSMODE (1 << 13)
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-#define OVCTRL0 (1 << 15)
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-#define OVCTRL1 (1 << 16)
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-#define UCHEN (1 << 17)
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+#define PLIM0 (1 << 15)
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+#define PLIM1 (1 << 16)
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+#define PLIMDIS (1 << 17)
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#define CHRGLEDEN (1 << 18)
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#define CHRGLEDEN (1 << 18)
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-#define CHRGRAWPDEN (1 << 19)
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+#define CHGTMRRST (1 << 19)
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#define CHGRESTART (1 << 20)
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#define CHGRESTART (1 << 20)
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#define CHGAUTOB (1 << 21)
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#define CHGAUTOB (1 << 21)
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#define CYCLB (1 << 22)
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#define CYCLB (1 << 22)
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