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@@ -16,6 +16,7 @@
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#include <linux/mii.h>
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#include <asm/blackfin.h>
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+#include <asm/portmux.h>
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#include <asm/mach-common/bits/dma.h>
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#include <asm/mach-common/bits/emac.h>
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#include <asm/mach-common/bits/pll.h>
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@@ -213,8 +214,17 @@ static int bfin_EMAC_recv(struct eth_device *dev)
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/* MDC = SCLK / MDC_freq / 2 - 1 */
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#define MDC_FREQ_TO_DIV(mdc_freq) (get_sclk() / (mdc_freq) / 2 - 1)
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+#ifndef CONFIG_BFIN_MAC_PINS
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+# ifdef CONFIG_RMII
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+# define CONFIG_BFIN_MAC_PINS P_RMII0
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+# else
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+# define CONFIG_BFIN_MAC_PINS P_MII0
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+# endif
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+#endif
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+
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static int bfin_miiphy_init(struct eth_device *dev, int *opmode)
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{
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+ const unsigned short pins[] = CONFIG_BFIN_MAC_PINS;
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u16 phydat;
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size_t count;
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@@ -222,42 +232,7 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode)
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*pVR_CTL |= CLKBUFOE;
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/* Set all the pins to peripheral mode */
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-#ifdef CONFIG_RMII
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- /* grab RMII pins */
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-# if defined(__ADSPBF51x__)
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- *pPORTF_MUX = (*pPORTF_MUX & \
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- ~(PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK)) | \
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- PORT_x_MUX_3_FUNC_1 | PORT_x_MUX_4_FUNC_1 | PORT_x_MUX_5_FUNC_1;
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- *pPORTF_FER |= PF8 | PF9 | PF10 | PF11 | PF12 | PF13 | PF14 | PF15;
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- *pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_1;
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- *pPORTG_FER |= PG0 | PG1 | PG2;
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-# elif defined(__ADSPBF52x__)
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- *pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2;
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- *pPORTG_FER |= PG14 | PG15;
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- *pPORTH_MUX = (*pPORTH_MUX & ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK)) | \
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- PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2;
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- *pPORTH_FER |= PH0 | PH1 | PH2 | PH3 | PH4 | PH5 | PH6 | PH7 | PH8;
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-# else
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- *pPORTH_FER |= PH0 | PH1 | PH4 | PH5 | PH6 | PH8 | PH9 | PH14 | PH15;
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-# endif
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-#else
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- /* grab MII & RMII pins */
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-# if defined(__ADSPBF51x__)
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- *pPORTF_MUX = (*pPORTF_MUX & \
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- ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK)) | \
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- PORT_x_MUX_0_FUNC_1 | PORT_x_MUX_1_FUNC_1 | PORT_x_MUX_3_FUNC_1 | PORT_x_MUX_4_FUNC_1 | PORT_x_MUX_5_FUNC_1;
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- *pPORTF_FER |= PF0 | PF1 | PF2 | PF3 | PF4 | PF5 | PF6 | PF8 | PF9 | PF10 | PF11 | PF12 | PF13 | PF14 | PF15;
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- *pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_1;
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- *pPORTG_FER |= PG0 | PG1 | PG2;
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-# elif defined(__ADSPBF52x__)
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- *pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2;
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- *pPORTG_FER |= PG14 | PG15;
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- *pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2 | PORT_x_MUX_2_FUNC_2;
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- *pPORTH_FER = -1; /* all pins */
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-# else
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- *pPORTH_FER = -1; /* all pins */
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-# endif
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-#endif
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+ peripheral_request_list(pins, "bfin_mac");
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/* Odd word alignment for Receive Frame DMA word */
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/* Configure checksum support and rcve frame word alignment */
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