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@@ -72,7 +72,6 @@
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#define MMC_SDHC2_BASE_ADDR 0x53FB8000
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#define MMC_SDHC2_BASE_ADDR 0x53FB8000
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#define MMC_SDHC3_BASE_ADDR 0x53FBC000
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#define MMC_SDHC3_BASE_ADDR 0x53FBC000
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#define IPU_CTRL_BASE_ADDR 0x53FC0000
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#define IPU_CTRL_BASE_ADDR 0x53FC0000
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-#define GPIO3_BASE_ADDR 0x53FA4000
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#define GPIO1_BASE_ADDR 0x53FCC000
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#define GPIO1_BASE_ADDR 0x53FCC000
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#define GPIO2_BASE_ADDR 0x53FD0000
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#define GPIO2_BASE_ADDR 0x53FD0000
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#define SDMA_BASE_ADDR 0x53FD4000
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#define SDMA_BASE_ADDR 0x53FD4000
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