am33xx: Do not touch 'ratio1' fields

The various ratio1 fields are not documented in any of the documentation
I can find.  Removing these and testing has yielded success, so remove
the code that sets them and move their locations into the reserved
fields.

Signed-off-by: Tom Rini <trini@ti.com>

arch/arm/cpu/armv7/am33xx/ddr.c

@@ -101,22 +101,11 @@ void config_cmd_ctrl(const struct cmd_control *cmd)
 void config_ddr_data(int macrono, const struct ddr_data *data)
 {
 	writel(data->datardsratio0, &ddr_reg[macrono]->dt0rdsratio0);
-	writel(data->datardsratio1, &ddr_reg[macrono]->dt0rdsratio1);
-
 	writel(data->datawdsratio0, &ddr_reg[macrono]->dt0wdsratio0);
-	writel(data->datawdsratio1, &ddr_reg[macrono]->dt0wdsratio1);
-
 	writel(data->datawiratio0, &ddr_reg[macrono]->dt0wiratio0);
-	writel(data->datawiratio1, &ddr_reg[macrono]->dt0wiratio1);
 	writel(data->datagiratio0, &ddr_reg[macrono]->dt0giratio0);
-	writel(data->datagiratio1, &ddr_reg[macrono]->dt0giratio1);
-
 	writel(data->datafwsratio0, &ddr_reg[macrono]->dt0fwsratio0);
-	writel(data->datafwsratio1, &ddr_reg[macrono]->dt0fwsratio1);
-
 	writel(data->datawrsratio0, &ddr_reg[macrono]->dt0wrsratio0);
-	writel(data->datawrsratio1, &ddr_reg[macrono]->dt0wrsratio1);
-
 	writel(data->datadldiff0, &ddr_reg[macrono]->dt0dldiff0);
 }
 

arch/arm/cpu/armv7/am33xx/emif4.c

@@ -51,22 +51,16 @@ void dram_init_banksize(void)
 static const struct ddr_data ddr2_data = {
 	.datardsratio0 = ((DDR2_RD_DQS<<30)|(DDR2_RD_DQS<<20)
 				|(DDR2_RD_DQS<<10)|(DDR2_RD_DQS<<0)),
-	.datardsratio1 = DDR2_RD_DQS>>2,
 	.datawdsratio0 = ((DDR2_WR_DQS<<30)|(DDR2_WR_DQS<<20)
 				|(DDR2_WR_DQS<<10)|(DDR2_WR_DQS<<0)),
-	.datawdsratio1 = DDR2_WR_DQS>>2,
 	.datawiratio0 = ((DDR2_PHY_WRLVL<<30)|(DDR2_PHY_WRLVL<<20)
 				|(DDR2_PHY_WRLVL<<10)|(DDR2_PHY_WRLVL<<0)),
-	.datawiratio1 = DDR2_PHY_WRLVL>>2,
 	.datagiratio0 = ((DDR2_PHY_GATELVL<<30)|(DDR2_PHY_GATELVL<<20)
 				|(DDR2_PHY_GATELVL<<10)|(DDR2_PHY_GATELVL<<0)),
-	.datagiratio1 = DDR2_PHY_GATELVL>>2,
 	.datafwsratio0 = ((DDR2_PHY_FIFO_WE<<30)|(DDR2_PHY_FIFO_WE<<20)
 				|(DDR2_PHY_FIFO_WE<<10)|(DDR2_PHY_FIFO_WE<<0)),
-	.datafwsratio1 = DDR2_PHY_FIFO_WE>>2,
 	.datawrsratio0 = ((DDR2_PHY_WR_DATA<<30)|(DDR2_PHY_WR_DATA<<20)
 				|(DDR2_PHY_WR_DATA<<10)|(DDR2_PHY_WR_DATA<<0)),
-	.datawrsratio1 = DDR2_PHY_WR_DATA>>2,
 	.datadldiff0 = PHY_DLL_LOCK_DIFF,
 };
 

arch/arm/include/asm/arch-am33xx/ddr_defs.h

@@ -88,25 +88,20 @@ struct ddr_regs {
 	unsigned int cm2iclkout;	/* offset 0x094 */
 	unsigned int resv3[12];
 	unsigned int dt0rdsratio0;	/* offset 0x0C8 */
-	unsigned int dt0rdsratio1;	/* offset 0x0CC */
-	unsigned int resv4[3];
+	unsigned int resv4[4];
 	unsigned int dt0wdsratio0;	/* offset 0x0DC */
-	unsigned int dt0wdsratio1;	/* offset 0x0E0 */
-	unsigned int resv5[3];
+	unsigned int resv5[4];
 	unsigned int dt0wiratio0;	/* offset 0x0F0 */
-	unsigned int dt0wiratio1;	/* offset 0x0F4 */
+	unsigned int resv6;
 	unsigned int dt0giratio0;	/* offset 0x0FC */
-	unsigned int dt0giratio1;	/* offset 0x100 */
-	unsigned int resv6[1];
+	unsigned int resv7[2];
 	unsigned int dt0fwsratio0;	/* offset 0x108 */
-	unsigned int dt0fwsratio1;	/* offset 0x10C */
-	unsigned int resv7[4];
+	unsigned int resv8[5];
 	unsigned int dt0wrsratio0;	/* offset 0x120 */
-	unsigned int dt0wrsratio1;	/* offset 0x124 */
-	unsigned int resv8[3];
+	unsigned int resv9[4];
 	unsigned int dt0rdelays0;	/* offset 0x134 */
 	unsigned int dt0dldiff0;	/* offset 0x138 */
-	unsigned int resv9[39];
+	unsigned int resv10[39];
 	unsigned int dt1rdelays0;	/* offset 0x1D8 */
 };
 
@@ -136,17 +131,11 @@ struct cmd_control {
  */
 struct ddr_data {
 	unsigned long datardsratio0;
-	unsigned long datardsratio1;
 	unsigned long datawdsratio0;
-	unsigned long datawdsratio1;
 	unsigned long datawiratio0;
-	unsigned long datawiratio1;
 	unsigned long datagiratio0;
-	unsigned long datagiratio1;
 	unsigned long datafwsratio0;
-	unsigned long datafwsratio1;
 	unsigned long datawrsratio0;
-	unsigned long datawrsratio1;
 	unsigned long datadldiff0;
 };