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@@ -162,6 +162,7 @@ typedef volatile unsigned int * dv_reg_p;
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#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000
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#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000
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#define DAVINCI_INTC_BASE 0xfffee000
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#define DAVINCI_INTC_BASE 0xfffee000
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#define DAVINCI_BOOTCFG_BASE 0x01c14000
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#define DAVINCI_BOOTCFG_BASE 0x01c14000
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+#define DAVINCI_LCD_CNTL_BASE 0x01e13000
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#define DAVINCI_L3CBARAM_BASE 0x80000000
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#define DAVINCI_L3CBARAM_BASE 0x80000000
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#define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18)
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#define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18)
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#define CHIP_REV_ID_REG (DAVINCI_BOOTCFG_BASE + 0x24)
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#define CHIP_REV_ID_REG (DAVINCI_BOOTCFG_BASE + 0x24)
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@@ -445,7 +446,8 @@ struct davinci_syscfg_regs {
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dv_reg rsvd[13];
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dv_reg rsvd[13];
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dv_reg kick0;
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dv_reg kick0;
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dv_reg kick1;
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dv_reg kick1;
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- dv_reg rsvd1[56];
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+ dv_reg rsvd1[53];
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+ dv_reg mstpri[3];
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dv_reg pinmux[20];
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dv_reg pinmux[20];
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dv_reg suspsrc;
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dv_reg suspsrc;
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dv_reg chipsig;
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dv_reg chipsig;
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