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@@ -77,7 +77,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_L2_CACHE /* toggle L2 cache */
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#define CONFIG_BTB /* toggle branch predition */
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#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
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-#define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */
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/*
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* Only possible on E500 Version 2 or newer cores.
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@@ -169,6 +168,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#undef CFG_FLASH_CHECKSUM
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#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
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#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
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