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@@ -384,19 +384,30 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
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/* READID must read all possible bytes while CEB is active */
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case NAND_CMD_READID:
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+ case NAND_CMD_PARAM: {
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+ int timing = IFC_FIR_OP_RB;
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+ if (command == NAND_CMD_PARAM)
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+ timing = IFC_FIR_OP_RBCD;
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+
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out_be32(&ifc->ifc_nand.nand_fir0,
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(IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) |
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(IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
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- (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT));
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+ (timing << IFC_NAND_FIR0_OP2_SHIFT));
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out_be32(&ifc->ifc_nand.nand_fcr0,
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- NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT);
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- /* 4 bytes for manuf, device and exts */
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- out_be32(&ifc->ifc_nand.nand_fbcr, 4);
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- ctrl->read_bytes = 4;
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+ command << IFC_NAND_FCR0_CMD0_SHIFT);
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+ out_be32(&ifc->ifc_nand.row3, column);
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+
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+ /*
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+ * although currently it's 8 bytes for READID, we always read
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+ * the maximum 256 bytes(for PARAM)
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+ */
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+ out_be32(&ifc->ifc_nand.nand_fbcr, 256);
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+ ctrl->read_bytes = 256;
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set_addr(mtd, 0, 0, 0);
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fsl_ifc_run_command(mtd);
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return;
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+ }
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/* ERASE1 stores the block and page address */
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case NAND_CMD_ERASE1:
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