fix DaVinci NS16550_REG_SIZE regression

Update the DaVinci DM6446 boards to use the new convention
for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed
from the original 4 bytes, but these chips are little-endian.

(Resolves a regression added recently by the include/ns16550.h
patch to "Unify structure declaration for registers".  The code
previously worked just fine because the registers were accessed
as host-endian words, not as bytes.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

include/configs/davinci_dvevm.h

@@ -85,7 +85,7 @@
 /*====================*/
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1	0x01c20000	/* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK		27000000	/* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */

include/configs/davinci_schmoogie.h

@@ -52,7 +52,7 @@
 /*====================*/
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1	0x01c20000	/* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK		27000000	/* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */

include/configs/davinci_sffsdr.h

@@ -54,7 +54,7 @@
 /* Serial Driver info */
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1	0x01c20000	/* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK		27000000	/* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */

include/configs/davinci_sonata.h

@@ -85,7 +85,7 @@
 /*====================*/
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size, byteorder */
 #define CONFIG_SYS_NS16550_COM1	0x01c20000	/* Base address of UART0 */
 #define CONFIG_SYS_NS16550_CLK		27000000	/* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */