85xx: Get ride of old TLB setup code

Now that all boards have been converted, remove old config code and the
config option for the new style.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

cpu/mpc85xx/cpu_init.c

@@ -149,27 +149,7 @@ void cpu_init_early_f(void)
 
 	init_laws();
 	invalidate_tlb(0);
-#ifdef CONFIG_FSL_INIT_TLBS
 	init_tlbs();
-#else
-	{
-		extern u32 tlb1_entry;
-		u32 *tmp = &tlb1_entry;
-		int i;
-		int num = tmp[2];
-
-		/* skip to actual table */
-		tmp += 3;
-
-		for (i = 0; i < num; i++, tmp += 4) {
-			mtspr(MAS0, tmp[0]);
-			mtspr(MAS1, tmp[1]);
-			mtspr(MAS2, tmp[2]);
-			mtspr(MAS3, tmp[3]);
-			asm volatile("isync;msync;tlbwe;isync");
-		}
-	}
-#endif
 }
 
 /*

cpu/mpc85xx/tlb.c

@@ -79,7 +79,6 @@ void invalidate_tlb(u8 tlb)
 
 void init_tlbs(void)
 {
-#ifdef CONFIG_FSL_INIT_TLBS
 	int i;
 
 	for (i = 0; i < num_tlb_entries; i++) {
@@ -88,7 +87,6 @@ void init_tlbs(void)
 			tlb_table[i].ts, tlb_table[i].esel, tlb_table[i].tsize,
 			tlb_table[i].iprot);
 	}
-#endif
 
 	return ;
 }

include/configs/ATUM8548.h

@@ -64,7 +64,6 @@
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 #define MPC85xx_DDR_SDRAM_CLK_CNTL	/* 85xx has clock control reg */
 

include/configs/MPC8540ADS.h

@@ -56,7 +56,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * sysclk for MPC85xx

include/configs/MPC8540EVAL.h

@@ -44,7 +44,6 @@
 #define CONFIG_DDR_DLL                      /* possible DLL fix needed */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /* Using Localbus SDRAM to emulate flash before we can program the flash,
  * normally you only need a flash-boot image(u-boot.bin),if unsure undef this.

include/configs/MPC8541CDS.h

@@ -48,7 +48,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * When initializing flash, if we cannot find the manufacturer ID,

include/configs/MPC8544DS.h

@@ -43,7 +43,6 @@
 #define CONFIG_FSL_PCIE_RESET	1	/* need PCIe reset errata */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE

include/configs/MPC8548CDS.h

@@ -56,7 +56,6 @@
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * When initializing flash, if we cannot find the manufacturer ID,

include/configs/MPC8555CDS.h

@@ -48,7 +48,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * When initializing flash, if we cannot find the manufacturer ID,

include/configs/MPC8560ADS.h

@@ -53,7 +53,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * sysclk for MPC85xx

include/configs/MPC8568MDS.h

@@ -50,7 +50,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * When initializing flash, if we cannot find the manufacturer ID,

include/configs/PM854.h

@@ -52,7 +52,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDEADBEEF
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * sysclk for MPC85xx

include/configs/PM856.h

@@ -52,7 +52,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xDEADBEEF
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * sysclk for MPC85xx

include/configs/SBC8540.h

@@ -57,7 +57,6 @@
 #undef  CONFIG_ETHER_ON_FCC		/* cpm FCC ethernet support	*/
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 #define CONFIG_ENV_OVERWRITE
 

include/configs/TQM85xx.h

@@ -51,7 +51,6 @@
 #endif
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /*
  * sysclk for MPC85xx

include/configs/sbc8548.h

@@ -57,7 +57,6 @@
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 #define MPC85xx_DDR_SDRAM_CLK_CNTL	/* 85xx has clock control reg */
 

include/configs/sbc8560.h

@@ -51,7 +51,6 @@
 #undef  CONFIG_ETHER_ON_FCC		/* cpm FCC ethernet support	*/
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 #define CONFIG_ENV_OVERWRITE
 

include/configs/stxgp3.h

@@ -52,7 +52,6 @@
 #define CONFIG_DDR_2T_TIMING		/* Sets the 2T timing bit */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /* sysclk for MPC85xx
  */

include/configs/stxssa.h

@@ -52,7 +52,6 @@
 #define CONFIG_DDR_2T_TIMING		/* Sets the 2T timing bit */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
-#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /* sysclk for MPC85xx
  */