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@@ -151,6 +151,7 @@
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#define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
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#define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
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+#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
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#define PIXIS_BASE 0xe8000000 /* PIXIS registers */
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#define PIXIS_BASE 0xe8000000 /* PIXIS registers */
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#define PIXIS_ID 0x0 /* Board ID at offset 0 */
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#define PIXIS_ID 0x0 /* Board ID at offset 0 */
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#define PIXIS_VER 0x1 /* Board version at offset 1 */
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#define PIXIS_VER 0x1 /* Board version at offset 1 */
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@@ -166,6 +167,7 @@
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#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
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#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
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#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
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#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
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#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
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#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
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+#define CFG_PIXIS_VBOOT_MASK 0x0C /* Reset altbank mask*/
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#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
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#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
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#define CFG_MAX_FLASH_SECT 1024 /* sectors per device */
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#define CFG_MAX_FLASH_SECT 1024 /* sectors per device */
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