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@@ -820,7 +820,7 @@ static void program_tr0(unsigned long *dimm_populated,
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break;
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}
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- debug("tr0: %x\n", tr0);
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+ debug("tr0: %lx\n", tr0);
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mtsdram(SDRAM0_TR0, tr0);
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}
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@@ -1051,7 +1051,7 @@ static void program_tr1(void)
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}
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tr1 |= SDRAM_TR1_RDCT_ENCODE(rdclt_average);
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- debug("tr1: %x\n", tr1);
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+ debug("tr1: %lx\n", tr1);
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/*
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* program SDRAM Timing Register 1 TR1
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@@ -1124,7 +1124,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
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num_col_addr = spd_read(iic0_dimm_addr[dimm_num], 4);
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num_banks = spd_read(iic0_dimm_addr[dimm_num], 5);
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bank_size_id = spd_read(iic0_dimm_addr[dimm_num], 31);
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- debug("DIMM%d: row=%d col=%d banks=%d\n", dimm_num,
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+ debug("DIMM%ld: row=%d col=%d banks=%d\n", dimm_num,
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num_row_addr, num_col_addr, num_banks);
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/*
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@@ -1193,9 +1193,11 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
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bank_parms[ctrl_bank_num[dimm_num]+i].bank_size_bytes =
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(4 << 20) * bank_size_id;
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bank_parms[ctrl_bank_num[dimm_num]+i].cr = cr;
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- debug("DIMM%d-bank %d (SDRAM0_B%dCR): bank_size_bytes=%d\n",
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- dimm_num, i, ctrl_bank_num[dimm_num]+i,
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- bank_parms[ctrl_bank_num[dimm_num]+i].bank_size_bytes);
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+ debug("DIMM%ld-bank %ld (SDRAM0_B%ldCR): "
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+ "bank_size_bytes=%ld\n",
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+ dimm_num, i,
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+ ctrl_bank_num[dimm_num] + i,
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+ bank_parms[ctrl_bank_num[dimm_num] + i].bank_size_bytes);
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}
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}
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}
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@@ -1239,7 +1241,8 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
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bank_parms[sorted_bank_num[bx_cr_num]].cr;
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mtdcr(SDRAM0_CFGDATA, temp);
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bank_base_addr += bank_parms[sorted_bank_num[bx_cr_num]].bank_size_bytes;
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- debug("SDRAM0_B%dCR=0x%08lx\n", sorted_bank_num[bx_cr_num], temp);
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+ debug("SDRAM0_B%ldCR=0x%08lx\n",
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+ sorted_bank_num[bx_cr_num], temp);
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}
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}
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