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@@ -58,6 +58,10 @@ typedef unsigned char byte;
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typedef unsigned short word;
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typedef unsigned short word;
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typedef unsigned long int dword;
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typedef unsigned long int dword;
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+struct smc91111_priv{
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+ u8 dev_num;
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+};
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+
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/*
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/*
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. DEBUGGING LEVELS
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. DEBUGGING LEVELS
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.
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.
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@@ -77,32 +81,32 @@ typedef unsigned long int dword;
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#ifdef CONFIG_PXA250
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#ifdef CONFIG_PXA250
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#ifdef CONFIG_XSENGINE
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#ifdef CONFIG_XSENGINE
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-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
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-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))))
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-#define SMC_inb(p) ({ \
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- unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p<<1)); \
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+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1))))
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+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r<<1))))
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+#define SMC_inb(a,p) ({ \
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+ unsigned int __p = (unsigned int)((a)->iobase + (p<<1)); \
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unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \
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unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \
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if (__p & 2) __v >>= 8; \
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if (__p & 2) __v >>= 8; \
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else __v &= 0xff; \
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else __v &= 0xff; \
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__v; })
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__v; })
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#elif defined(CONFIG_XAENIAX)
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#elif defined(CONFIG_XAENIAX)
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-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
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-#define SMC_inw(z) ({ \
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- unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (z)); \
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+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
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+#define SMC_inw(a,z) ({ \
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+ unsigned int __p = (unsigned int)((a)->iobase + (z)); \
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unsigned int __v = *(volatile unsigned int *)((__p) & ~3); \
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unsigned int __v = *(volatile unsigned int *)((__p) & ~3); \
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if (__p & 3) __v >>= 16; \
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if (__p & 3) __v >>= 16; \
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else __v &= 0xffff; \
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else __v &= 0xffff; \
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__v; })
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__v; })
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-#define SMC_inb(p) ({ \
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- unsigned int ___v = SMC_inw((p) & ~1); \
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+#define SMC_inb(a,p) ({ \
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+ unsigned int ___v = SMC_inw((a),(p) & ~1); \
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if (p & 1) ___v >>= 8; \
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if (p & 1) ___v >>= 8; \
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else ___v &= 0xff; \
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else ___v &= 0xff; \
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___v; })
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___v; })
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#else
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#else
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-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
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-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
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-#define SMC_inb(p) ({ \
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- unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p)); \
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+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
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+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
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+#define SMC_inb(a,p) ({ \
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+ unsigned int __p = (unsigned int)((a)->iobase + (p)); \
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unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \
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unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \
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if (__p & 1) __v >>= 8; \
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if (__p & 1) __v >>= 8; \
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else __v &= 0xff; \
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else __v &= 0xff; \
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@@ -110,69 +114,69 @@ typedef unsigned long int dword;
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#endif
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#endif
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#ifdef CONFIG_XSENGINE
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#ifdef CONFIG_XSENGINE
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-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
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-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))) = d)
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+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
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+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d)
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#elif defined (CONFIG_XAENIAX)
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#elif defined (CONFIG_XAENIAX)
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-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
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-#define SMC_outw(d,p) ({ \
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- dword __dwo = SMC_inl((p) & ~3); \
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+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
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+#define SMC_outw(a,d,p) ({ \
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+ dword __dwo = SMC_inl((a),(p) & ~3); \
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dword __dwn = (word)(d); \
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dword __dwn = (word)(d); \
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__dwo &= ((p) & 3) ? 0x0000ffff : 0xffff0000; \
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__dwo &= ((p) & 3) ? 0x0000ffff : 0xffff0000; \
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__dwo |= ((p) & 3) ? __dwn << 16 : __dwn; \
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__dwo |= ((p) & 3) ? __dwn << 16 : __dwn; \
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- SMC_outl(__dwo, (p) & ~3); \
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+ SMC_outl((a), __dwo, (p) & ~3); \
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})
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})
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#else
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#else
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-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
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-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
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+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
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+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
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#endif
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#endif
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-#define SMC_outb(d,r) ({ word __d = (byte)(d); \
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- word __w = SMC_inw((r)&~1); \
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+#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
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+ word __w = SMC_inw((a),(r)&~1); \
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__w &= ((r)&1) ? 0x00FF : 0xFF00; \
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__w &= ((r)&1) ? 0x00FF : 0xFF00; \
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__w |= ((r)&1) ? __d<<8 : __d; \
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__w |= ((r)&1) ? __d<<8 : __d; \
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- SMC_outw(__w,(r)&~1); \
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+ SMC_outw((a),__w,(r)&~1); \
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})
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})
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-#define SMC_outsl(r,b,l) ({ int __i; \
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+#define SMC_outsl(a,r,b,l) ({ int __i; \
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dword *__b2; \
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dword *__b2; \
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__b2 = (dword *) b; \
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__b2 = (dword *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- SMC_outl( *(__b2 + __i), r); \
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+ SMC_outl((a), *(__b2 + __i), r); \
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} \
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} \
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})
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})
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-#define SMC_outsw(r,b,l) ({ int __i; \
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+#define SMC_outsw(a,r,b,l) ({ int __i; \
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word *__b2; \
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word *__b2; \
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__b2 = (word *) b; \
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__b2 = (word *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- SMC_outw( *(__b2 + __i), r); \
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+ SMC_outw((a), *(__b2 + __i), r); \
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} \
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} \
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})
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})
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-#define SMC_insl(r,b,l) ({ int __i ; \
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+#define SMC_insl(a,r,b,l) ({ int __i ; \
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dword *__b2; \
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dword *__b2; \
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__b2 = (dword *) b; \
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__b2 = (dword *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- *(__b2 + __i) = SMC_inl(r); \
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- SMC_inl(0); \
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+ *(__b2 + __i) = SMC_inl((a),(r)); \
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+ SMC_inl((a),0); \
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}; \
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}; \
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})
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})
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-#define SMC_insw(r,b,l) ({ int __i ; \
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+#define SMC_insw(a,r,b,l) ({ int __i ; \
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word *__b2; \
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word *__b2; \
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__b2 = (word *) b; \
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__b2 = (word *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- *(__b2 + __i) = SMC_inw(r); \
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- SMC_inw(0); \
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+ *(__b2 + __i) = SMC_inw((a),(r)); \
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+ SMC_inw((a),0); \
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}; \
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}; \
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})
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})
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-#define SMC_insb(r,b,l) ({ int __i ; \
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+#define SMC_insb(a,r,b,l) ({ int __i ; \
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byte *__b2; \
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byte *__b2; \
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__b2 = (byte *) b; \
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__b2 = (byte *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- *(__b2 + __i) = SMC_inb(r); \
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- SMC_inb(0); \
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+ *(__b2 + __i) = SMC_inb((a),(r)); \
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+ SMC_inb((a),0); \
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}; \
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}; \
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})
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})
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@@ -187,61 +191,61 @@ typedef unsigned long int dword;
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((0x00FF0000UL & _x) >> 8) | \
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((0x00FF0000UL & _x) >> 8) | \
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(_x >> 24)); })
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(_x >> 24)); })
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-#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))))
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-#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))
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-#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))))
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-#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))
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-#define SMC_inb(p) ({ \
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- word ___v = SMC_inw((p) & ~1); \
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+#define SMC_inl(a,r) (SMC_LEON_SWAP32((*(volatile dword *)((a)->iobase+((r)<<0)))))
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+#define SMC_inl_nosw(a,r) ((*(volatile dword *)((a)->iobase+((r)<<0))))
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+#define SMC_inw(a,r) (SMC_LEON_SWAP16((*(volatile word *)((a)->iobase+((r)<<0)))))
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+#define SMC_inw_nosw(a,r) ((*(volatile word *)((a)->iobase+((r)<<0))))
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+#define SMC_inb(a,p) ({ \
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+ word ___v = SMC_inw((a),(p) & ~1); \
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if ((p) & 1) ___v >>= 8; \
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if ((p) & 1) ___v >>= 8; \
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else ___v &= 0xff; \
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else ___v &= 0xff; \
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___v; })
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___v; })
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-#define SMC_outl(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP32(d))
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-#define SMC_outl_nosw(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=(d))
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-#define SMC_outw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP16(d))
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-#define SMC_outw_nosw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=(d))
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-#define SMC_outb(d,r) do{ word __d = (byte)(d); \
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- word __w = SMC_inw((r)&~1); \
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+#define SMC_outl(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP32(d))
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+#define SMC_outl_nosw(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=(d))
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+#define SMC_outw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP16(d))
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+#define SMC_outw_nosw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=(d))
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+#define SMC_outb(a,d,r) do{ word __d = (byte)(d); \
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+ word __w = SMC_inw((a),(r)&~1); \
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__w &= ((r)&1) ? 0x00FF : 0xFF00; \
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__w &= ((r)&1) ? 0x00FF : 0xFF00; \
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__w |= ((r)&1) ? __d<<8 : __d; \
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__w |= ((r)&1) ? __d<<8 : __d; \
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- SMC_outw(__w,(r)&~1); \
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+ SMC_outw((a),__w,(r)&~1); \
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}while(0)
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}while(0)
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-#define SMC_outsl(r,b,l) do{ int __i; \
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+#define SMC_outsl(a,r,b,l) do{ int __i; \
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dword *__b2; \
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dword *__b2; \
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__b2 = (dword *) b; \
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__b2 = (dword *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- SMC_outl_nosw( *(__b2 + __i), r); \
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+ SMC_outl_nosw((a), *(__b2 + __i), r); \
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} \
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} \
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}while(0)
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}while(0)
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-#define SMC_outsw(r,b,l) do{ int __i; \
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+#define SMC_outsw(a,r,b,l) do{ int __i; \
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word *__b2; \
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word *__b2; \
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__b2 = (word *) b; \
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__b2 = (word *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- SMC_outw_nosw( *(__b2 + __i), r); \
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+ SMC_outw_nosw((a), *(__b2 + __i), r); \
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} \
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} \
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}while(0)
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}while(0)
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-#define SMC_insl(r,b,l) do{ int __i ; \
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+#define SMC_insl(a,r,b,l) do{ int __i ; \
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dword *__b2; \
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dword *__b2; \
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__b2 = (dword *) b; \
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__b2 = (dword *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- *(__b2 + __i) = SMC_inl_nosw(r); \
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+ *(__b2 + __i) = SMC_inl_nosw((a),(r)); \
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}; \
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}; \
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}while(0)
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}while(0)
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-#define SMC_insw(r,b,l) do{ int __i ; \
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+#define SMC_insw(a,r,b,l) do{ int __i ; \
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word *__b2; \
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word *__b2; \
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__b2 = (word *) b; \
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__b2 = (word *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- *(__b2 + __i) = SMC_inw_nosw(r); \
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+ *(__b2 + __i) = SMC_inw_nosw((a),(r)); \
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}; \
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}; \
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}while(0)
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}while(0)
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-#define SMC_insb(r,b,l) do{ int __i ; \
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+#define SMC_insb(a,r,b,l) do{ int __i ; \
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byte *__b2; \
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byte *__b2; \
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__b2 = (byte *) b; \
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__b2 = (byte *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- *(__b2 + __i) = SMC_inb(r); \
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+ *(__b2 + __i) = SMC_inb((a),(r)); \
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}; \
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}; \
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}while(0)
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}while(0)
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@@ -253,48 +257,48 @@ typedef unsigned long int dword;
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*/
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*/
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#ifdef CONFIG_ADNPESC1
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#ifdef CONFIG_ADNPESC1
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-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
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+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
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#elif CONFIG_BLACKFIN
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#elif CONFIG_BLACKFIN
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-#define SMC_inw(r) ({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); SSYNC(); __v;})
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+#define SMC_inw(a,r) ({ word __v = (*((volatile word *)((a)->iobase+(r)))); SSYNC(); __v;})
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#else
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#else
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-#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
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+#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
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#endif
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#endif
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-#define SMC_inb(r) (((r)&1) ? SMC_inw((r)&~1)>>8 : SMC_inw(r)&0xFF)
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+#define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF))
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#ifdef CONFIG_ADNPESC1
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#ifdef CONFIG_ADNPESC1
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-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
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+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+((r)<<1))) = d)
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#elif CONFIG_BLACKFIN
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#elif CONFIG_BLACKFIN
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-#define SMC_outw(d,r) {(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d); SSYNC();}
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+#define SMC_outw(a,d,r) {(*((volatile word *)((a)->iobase+(r))) = d); SSYNC();}
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#else
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#else
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-#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
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+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
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#endif
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#endif
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-#define SMC_outb(d,r) ({ word __d = (byte)(d); \
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- word __w = SMC_inw((r)&~1); \
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+#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
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+ word __w = SMC_inw((a),(r)&~1); \
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__w &= ((r)&1) ? 0x00FF : 0xFF00; \
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__w &= ((r)&1) ? 0x00FF : 0xFF00; \
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__w |= ((r)&1) ? __d<<8 : __d; \
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__w |= ((r)&1) ? __d<<8 : __d; \
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- SMC_outw(__w,(r)&~1); \
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+ SMC_outw((a),__w,(r)&~1); \
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})
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})
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#if 0
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#if 0
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-#define SMC_outsw(r,b,l) outsw(SMC_BASE_ADDRESS+(r), (b), (l))
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+#define SMC_outsw(a,r,b,l) outsw((a)->iobase+(r), (b), (l))
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#else
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#else
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-#define SMC_outsw(r,b,l) ({ int __i; \
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+#define SMC_outsw(a,r,b,l) ({ int __i; \
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word *__b2; \
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word *__b2; \
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__b2 = (word *) b; \
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__b2 = (word *) b; \
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for (__i = 0; __i < l; __i++) { \
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for (__i = 0; __i < l; __i++) { \
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- SMC_outw( *(__b2 + __i), r); \
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+ SMC_outw((a), *(__b2 + __i), r); \
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} \
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} \
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})
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})
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#endif
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#endif
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#if 0
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#if 0
|
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-#define SMC_insw(r,b,l) insw(SMC_BASE_ADDRESS+(r), (b), (l))
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|
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+#define SMC_insw(a,r,b,l) insw((a)->iobase+(r), (b), (l))
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#else
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#else
|
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-#define SMC_insw(r,b,l) ({ int __i ; \
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|
|
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+#define SMC_insw(a,r,b,l) ({ int __i ; \
|
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word *__b2; \
|
|
word *__b2; \
|
|
__b2 = (word *) b; \
|
|
__b2 = (word *) b; \
|
|
for (__i = 0; __i < l; __i++) { \
|
|
for (__i = 0; __i < l; __i++) { \
|
|
- *(__b2 + __i) = SMC_inw(r); \
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|
|
- SMC_inw(0); \
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|
|
+ *(__b2 + __i) = SMC_inw((a),(r)); \
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|
|
|
+ SMC_inw((a),0); \
|
|
}; \
|
|
}; \
|
|
})
|
|
})
|
|
#endif
|
|
#endif
|
|
@@ -304,30 +308,30 @@ typedef unsigned long int dword;
|
|
#if defined(CONFIG_SMC_USE_32_BIT)
|
|
#if defined(CONFIG_SMC_USE_32_BIT)
|
|
|
|
|
|
#ifdef CONFIG_XSENGINE
|
|
#ifdef CONFIG_XSENGINE
|
|
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
|
|
|
|
|
|
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1))))
|
|
#else
|
|
#else
|
|
-#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
|
|
|
|
|
|
+#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
|
|
#endif
|
|
#endif
|
|
|
|
|
|
-#define SMC_insl(r,b,l) ({ int __i ; \
|
|
|
|
|
|
+#define SMC_insl(a,r,b,l) ({ int __i ; \
|
|
dword *__b2; \
|
|
dword *__b2; \
|
|
__b2 = (dword *) b; \
|
|
__b2 = (dword *) b; \
|
|
for (__i = 0; __i < l; __i++) { \
|
|
for (__i = 0; __i < l; __i++) { \
|
|
- *(__b2 + __i) = SMC_inl(r); \
|
|
|
|
- SMC_inl(0); \
|
|
|
|
|
|
+ *(__b2 + __i) = SMC_inl((a),(r)); \
|
|
|
|
+ SMC_inl((a),0); \
|
|
}; \
|
|
}; \
|
|
})
|
|
})
|
|
|
|
|
|
#ifdef CONFIG_XSENGINE
|
|
#ifdef CONFIG_XSENGINE
|
|
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
|
|
|
|
|
|
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
|
|
#else
|
|
#else
|
|
-#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
|
|
|
|
|
|
+#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
|
|
#endif
|
|
#endif
|
|
-#define SMC_outsl(r,b,l) ({ int __i; \
|
|
|
|
|
|
+#define SMC_outsl(a,r,b,l) ({ int __i; \
|
|
dword *__b2; \
|
|
dword *__b2; \
|
|
__b2 = (dword *) b; \
|
|
__b2 = (dword *) b; \
|
|
for (__i = 0; __i < l; __i++) { \
|
|
for (__i = 0; __i < l; __i++) { \
|
|
- SMC_outl( *(__b2 + __i), r); \
|
|
|
|
|
|
+ SMC_outl((a), *(__b2 + __i), r); \
|
|
} \
|
|
} \
|
|
})
|
|
})
|
|
|
|
|
|
@@ -752,25 +756,25 @@ enum {
|
|
|
|
|
|
/* select a register bank, 0 to 3 */
|
|
/* select a register bank, 0 to 3 */
|
|
|
|
|
|
-#define SMC_SELECT_BANK(x) { SMC_outw( x, BANK_SELECT ); }
|
|
|
|
|
|
+#define SMC_SELECT_BANK(a,x) { SMC_outw((a), (x), BANK_SELECT ); }
|
|
|
|
|
|
/* this enables an interrupt in the interrupt mask register */
|
|
/* this enables an interrupt in the interrupt mask register */
|
|
-#define SMC_ENABLE_INT(x) {\
|
|
|
|
|
|
+#define SMC_ENABLE_INT(a,x) {\
|
|
unsigned char mask;\
|
|
unsigned char mask;\
|
|
- SMC_SELECT_BANK(2);\
|
|
|
|
- mask = SMC_inb( IM_REG );\
|
|
|
|
|
|
+ SMC_SELECT_BANK((a),2);\
|
|
|
|
+ mask = SMC_inb((a), IM_REG );\
|
|
mask |= (x);\
|
|
mask |= (x);\
|
|
- SMC_outb( mask, IM_REG ); \
|
|
|
|
|
|
+ SMC_outb( (a), mask, IM_REG ); \
|
|
}
|
|
}
|
|
|
|
|
|
/* this disables an interrupt from the interrupt mask register */
|
|
/* this disables an interrupt from the interrupt mask register */
|
|
|
|
|
|
-#define SMC_DISABLE_INT(x) {\
|
|
|
|
|
|
+#define SMC_DISABLE_INT(a,x) {\
|
|
unsigned char mask;\
|
|
unsigned char mask;\
|
|
SMC_SELECT_BANK(2);\
|
|
SMC_SELECT_BANK(2);\
|
|
- mask = SMC_inb( IM_REG );\
|
|
|
|
|
|
+ mask = SMC_inb( (a), IM_REG );\
|
|
mask &= ~(x);\
|
|
mask &= ~(x);\
|
|
- SMC_outb( mask, IM_REG ); \
|
|
|
|
|
|
+ SMC_outb( (a), mask, IM_REG ); \
|
|
}
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------
|
|
/*----------------------------------------------------------------------
|