ARM: OMAP3+: Detect reset type

Certain modules are not affected by means of
a warm reset and need not be configured again.
Adding an API to detect the reset reason warm/cold.

This will be used to skip the module configurations
that are retained across a warm reset.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>

arch/arm/cpu/armv7/omap-common/reset.c

@@ -34,3 +34,8 @@ void __weak reset_cpu(unsigned long ignored)
 {
 	writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
 }
+
+u32 __weak warm_reset(void)
+{
+	return (readl(PRM_RSTST) & PRM_RSTST_WARM_RESET_MASK);
+}

arch/arm/include/asm/arch-am33xx/cpu.h

@@ -53,8 +53,10 @@
 /* Reset control */
 #ifdef CONFIG_AM33XX
 #define PRM_RSTCTRL			0x44E00F00
+#define PRM_RSTST			0x44E00F08
 #endif
 #define PRM_RSTCTRL_RESET		0x01
+#define PRM_RSTST_WARM_RESET_MASK	0x232
 
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__

arch/arm/include/asm/arch-omap3/cpu.h

@@ -479,6 +479,8 @@ struct prm {
 
 #define PRM_RSTCTRL		0x48307250
 #define PRM_RSTCTRL_RESET	0x04
+#define PRM_RSTST			0x48307258
+#define PRM_RSTST_WARM_RESET_MASK	0x7D2
 #define SYSCLKDIV_1		(0x1 << 6)
 #define SYSCLKDIV_2		(0x1 << 7)
 

arch/arm/include/asm/arch-omap3/sys_proto.h

@@ -74,4 +74,5 @@ void power_init_r(void);
 void dieid_num_r(void);
 void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
 void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+u32 warm_reset(void);
 #endif

arch/arm/include/asm/arch-omap4/cpu.h

@@ -178,5 +178,7 @@ struct watchdog {
 
 #define PRM_RSTCTRL		PRM_DEVICE_BASE
 #define PRM_RSTCTRL_RESET	0x01
+#define PRM_RSTST		(PRM_DEVICE_BASE + 0x4)
+#define PRM_RSTST_WARM_RESET_MASK	0x07EA
 
 #endif /* _CPU_H */

arch/arm/include/asm/arch-omap4/sys_proto.h

@@ -57,6 +57,7 @@ void init_omap_revision(void);
 void do_io_settings(void);
 void omap_vc_init(u16 speed_khz);
 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
+u32 warm_reset(void);
 /*
  * This is used to verify if the configuration header
  * was executed by Romcode prior to control of transfer

arch/arm/include/asm/arch-omap5/cpu.h

@@ -182,5 +182,7 @@ struct watchdog {
 
 #define PRM_RSTCTRL		PRM_DEVICE_BASE
 #define PRM_RSTCTRL_RESET	0x01
+#define PRM_RSTST		(PRM_DEVICE_BASE + 0x4)
+#define PRM_RSTST_WARM_RESET_MASK	0x7FEA
 
 #endif /* _CPU_H */

arch/arm/include/asm/arch-omap5/sys_proto.h

@@ -57,6 +57,7 @@ void init_omap_revision(void);
 void do_io_settings(void);
 void omap_vc_init(u16 speed_khz);
 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
+u32 warm_reset(void);
 
 /*
  * This is used to verify if the configuration header