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@@ -44,6 +44,11 @@
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#define CONFIG_PERIPORT_BASE 0x70000000
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#define CONFIG_PERIPORT_SIZE 0x13
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+#define CONFIG_SYS_IRAM_BASE 0x0c000000 /* Internal SRAM base address */
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+#define CONFIG_SYS_IRAM_SIZE 0x2000 /* 8 KB of internal SRAM memory */
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+#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE)
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+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE)
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+
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#define CONFIG_SYS_SDRAM_BASE 0x50000000
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/* input clock of PLL: SMDK6400 has 12MHz input clock */
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