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@@ -483,7 +483,9 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
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unsigned int i;
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unsigned int i;
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char buffer[HWCONFIG_BUFFER_SIZE];
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char buffer[HWCONFIG_BUFFER_SIZE];
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char *buf = NULL;
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char *buf = NULL;
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+#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2)
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const struct dynamic_odt *pdodt = odt_unknown;
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const struct dynamic_odt *pdodt = odt_unknown;
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+#endif
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ulong ddr_freq;
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ulong ddr_freq;
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/*
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/*
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@@ -493,6 +495,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
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if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
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if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
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buf = buffer;
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buf = buffer;
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+#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2)
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/* Chip select options. */
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/* Chip select options. */
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if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) {
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if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) {
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switch (pdimm[0].n_ranks) {
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switch (pdimm[0].n_ranks) {
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@@ -546,6 +549,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
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break;
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break;
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}
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}
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}
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}
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+#endif
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/* Pick chip-select local options. */
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/* Pick chip-select local options. */
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for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
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for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
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