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@@ -1530,6 +1530,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT 25
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#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT 25
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uint porbmsr; /* 0xe0004 - POR boot mode status register */
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uint porbmsr; /* 0xe0004 - POR boot mode status register */
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#define MPC85xx_PORBMSR_HA 0x00070000
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#define MPC85xx_PORBMSR_HA 0x00070000
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+#define MPC85xx_PORBMSR_HA_SHIFT 16
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uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
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uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
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uint pordevsr; /* 0xe000c - POR I/O device status regsiter */
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uint pordevsr; /* 0xe000c - POR I/O device status regsiter */
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#define MPC85xx_PORDEVSR_SGMII1_DIS 0x20000000
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#define MPC85xx_PORDEVSR_SGMII1_DIS 0x20000000
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@@ -1539,6 +1540,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000
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#define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000
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#define MPC85xx_PORDEVSR_PCI1 0x00800000
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#define MPC85xx_PORDEVSR_PCI1 0x00800000
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#define MPC85xx_PORDEVSR_IO_SEL 0x00780000
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#define MPC85xx_PORDEVSR_IO_SEL 0x00780000
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+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19
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#define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000
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#define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000
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#define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000
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#define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000
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#define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000
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#define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000
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