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powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only

Only the first DIMM of first controller should fall back to raw timing
parameters if SPD is missing or corrupted.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun 12 年之前
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共有 1 个文件被更改,包括 1 次插入1 次删除
  1. 1 1
      arch/powerpc/cpu/mpc8xxx/ddr/main.c

+ 1 - 1
arch/powerpc/cpu/mpc8xxx/ddr/main.c

@@ -383,7 +383,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
 
 
 				retval = compute_dimm_parameters(spd, pdimm, i);
 				retval = compute_dimm_parameters(spd, pdimm, i);
 #ifdef CONFIG_SYS_DDR_RAW_TIMING
 #ifdef CONFIG_SYS_DDR_RAW_TIMING
-				if (retval != 0) {
+				if (!i && !j && retval) {
 					printf("SPD error on controller %d! "
 					printf("SPD error on controller %d! "
 					"Trying fallback to raw timing "
 					"Trying fallback to raw timing "
 					"calculation\n", i);
 					"calculation\n", i);