Fix coding style issues; update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>

CHANGELOG

@@ -1,3 +1,687 @@
+commit 467bcee11fe26ad422f2de971aa70866079870f2
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Fri Dec 14 15:36:18 2007 +0100
+
+    cfi_flash: Add manufacturer-specific fixups
+
+    Run fixups based on the JEDEC manufacturer ID independent of the
+    command set ID.
+
+    This changes current behaviour: Previously, geometry reversal for AMD
+    chips were done based on the command set ID, while they are now done
+    based on the JEDEC manufacturer and device ID.
+
+    Also add fixup for top-boot Atmel chips. A fixup is needed for
+    AT49BV6416(T) too, but since u-boot currently only reads the low byte
+    of the device ID, there's no way to tell it apart from AT49BV642D,
+    which should not have this fixup. Since AT49BV642D support is
+    necessary to get ATNGW100 board support into mainline, I've commented
+    out the fixup for now.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 0ddf06ddf6b4bd057ad4c5f0dffea7870ba06a2a
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Fri Dec 14 15:36:17 2007 +0100
+
+    cfi_flash: Add cmdset-specific init functions
+
+    Move things like reading JEDEC IDs and fixing up geometry reversal
+    into separate functions. The geometry reversal fixup is now performed
+    by altering the qry structure directly, which makes the sector init
+    code slightly cleaner.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit e23741f4a6d8047520ef0d4971762749b3587d32
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Fri Dec 14 15:36:16 2007 +0100
+
+    cfi_flash: Read whole QRY structure in one go
+
+    Read out the whole CFI Standard Query structure after successful cfi
+    identification. This allows subsequent code to access this information
+    directly without having to go through flash_read_uchar() and friends.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit df9c25ea04b38a0e05d4f8c73c5cc144cdafa7db
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Mon Dec 17 11:02:44 2007 +0100
+
+    AVR32: Fix logic inversion in disable_interrupts()
+
+    disable_interrupts() should return nonzero if interrupts were
+    _enabled_ before, not disabled.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit acac475212cbedb17b321a363a1c878e2b47b37f
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Fri Dec 14 16:51:22 2007 +0100
+
+    AVR32: Enable interrupts at bootup
+
+    The timer code depends on the timer interrupt to keep track of the
+    upper 32 bits of the cycle counter. This obviously doesn't work when
+    interrupts are disabled the whole time.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 9570bcd87f4db255514f43b6701746c412f8fef0
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Nov 15 10:03:45 2007 +0100
+
+    AVR32: Fix wrong pin setup for USART3
+
+    As reported by Gerhard Berghofer:
+
+    in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
+    instead of PB18 and PB19.
+
+    which is obviously correct. There's currently no code that uses
+    USART3, but custom boards may run into problems.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 09ea0de03dcc3ee7af045b0b572227bda2c1c918
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Nov 1 12:44:20 2007 +0100
+
+    README: Remove ATSTK1000 daughterboard list
+
+    As noted by Kim Phillips, these lists tend to become out of date.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit c81cbbad21cb0ae983e2e796211202234cdc8be2
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Tue Oct 30 14:56:36 2007 +0100
+
+    Add ATSTK100[234] to MAINTAINERS
+
+    Add all the ATSTK1000 daughterboards to MAINTAINERS along with their
+    "mother". Also update the entry for ATSTK1000 to be not only about the
+    AP7000 CPU; it's intended to handle all CPUs in the AT32AP family.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 64ff2357b1727213803591813dbc779c924bf772
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Mon Oct 29 13:02:54 2007 +0100
+
+    AVR32: Add support for the ATSTK1004 board
+
+    ATSTK1004 is a daughterboard for ATSTK1000 with the AT32AP7002 CPU,
+    which is a derivative of AT32AP7000.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 667568db157f374b85abd7e03596ddd1f0b25681
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Mon Oct 29 13:02:54 2007 +0100
+
+    AVR32: Add support for the ATSTK1003 board
+
+    ATSTK1003 is a daughterboard for ATSTK1000 with the AT32AP7001 CPU,
+    which is a derivative of AT32AP7000.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 5fee84a794a51ec830548cda485a770efb018b92
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Mon Oct 29 13:23:33 2007 +0100
+
+    AVR32: Make some AT32AP700x peripherals optional
+
+    Add a chip-features file providing definitions of the form
+
+    AT32AP700x_CHIP_HAS_<peripheral>
+
+    to indicate the availability of the given peripheral on the currently
+    selected chip.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 36f28f8a9605ee5dcfa330482cfc62171261af97
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Mon Oct 29 13:09:56 2007 +0100
+
+    AVR32: Rename at32ap7000 -> at32ap700x
+
+    The SoC-specific code for all the AT32AP700x CPUs is practically
+    identical; the only difference is that some chips have less features
+    than others. By doing this rename, we can add support for the AP7000
+    derivatives simply by making some features conditional.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 4d5fa99c73f354e7cf985efcf417ea55ca2f6a5e
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Fri Jun 29 18:22:34 2007 +0200
+
+    atmel_mci: Show SR when block read fails
+
+    Show controller status as well as card status when an error occurs
+    during block read.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 12d30aa79779c2aa7a998bbae4c075f822a53004
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Dec 13 12:56:34 2007 +0100
+
+    cfi_flash: Use map_physmem() and unmap_physmem()
+
+    Use map_physmem() and unmap_physmem() to convert from physical to
+    virtual addresses. This gives the arch a chance to provide an uncached
+    mapping for flash accesses.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 4d7d6936eb29af7cca330937808312aa5f61454d
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Dec 13 12:56:33 2007 +0100
+
+    Introduce map_physmem() and unmap_physmem()
+
+    map_physmem() returns a virtual address which can be used to access a
+    given physical address without involving the cache. unmap_physmem()
+    should be called when the virtual address returned by map_physmem() is
+    no longer needed.
+
+    This patch adds a stub implementation which simply returns the
+    physical address cast to a uchar * for all architectures except AVR32,
+    which converts the physical address to an uncached virtual mapping.
+    unmap_physmem() is a no-op on all architectures, but if any
+    architecture needs to do such mappings through the TLB, this is the
+    hook where those TLB entries can be invalidated.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit cdbaefb5f5f03e54455d0439dcf6dbd97ead1f9d
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Dec 13 12:56:32 2007 +0100
+
+    cfi_flash: Introduce read and write accessors
+
+    Introduce flash_read{8,16,32,64) and flash_write{8,16,32,64} and use
+    them to access the flash memory. This makes it clearer when the flash
+    is actually being accessed; merely dereferencing a volatile pointer
+    looks just like any other kind of access.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 812711ce6b3a386125dcf0d6a59588e461abbb87
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Dec 13 12:56:31 2007 +0100
+
+    Implement __raw_{read,write}[bwl] on all architectures
+
+    This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
+    m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
+    from Linux.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit be60a9021c82fc5aecd5b2b1fc96f70a9c81bbcd
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Sat Oct 6 18:55:36 2007 +0200
+
+    cfi_flash: Reorder functions and eliminate extra prototypes
+
+    Reorder the functions in cfi_flash.c so that each function only uses
+    functions that have been defined before it. This allows the static
+    prototype declarations near the top to be eliminated and might allow
+    gcc to do a better job inlining functions.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 3055793bcbdf24b1f8117f606ffb766d32eb766f
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Dec 13 12:56:29 2007 +0100
+
+    cfi_flash: Make some needlessly global functions static
+
+    Make functions not declared in any header file static.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 7e5b9b471518c5652febc68ba62b432193d6abf4
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Dec 13 12:56:28 2007 +0100
+
+    cfi_flash: Break long lines
+
+    This patch tries to keep all lines in the cfi_flash driver below 80
+    columns. There are a few lines left which don't fit this requirement
+    because I couldn't find any trivial way to break them (i.e. it would
+    take some restructuring, which I intend to do in a later patch.)
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 42026c9cb3a76849b41e6e24abfb7b56807a5c1a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date:	Tue Dec 11 13:59:57 2007 +0100
+
+    CFI: synchronize command offsets with Linux CFI driver
+
+    Fixes non-working CFI Flash on the Inka4x0 board.
+
+    Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 8ff3de61fc5f9b3b21647bce081a3b7f710f0d4d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Dec 7 12:17:34 2007 -0600
+
+    Handle MPC85xx PCIe reset errata (PCI-Ex 38)
+
+    On the MPC85xx boards that have PCIe enable the PCIe errata fix.
+    (MPC8544DS, MPC8548CDS, MPC8568MDS).
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 82ac8c97145a4c3bf8b3dbfad00fa96e920f9b9c
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Dec 7 12:04:30 2007 -0600
+
+    Update Freescale MPC85xx ADS/CDS/MDS board config
+
+    * Enabled CONFIG_CMD_ELF
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d435793229ce29a42797c1edc39f5b34f987f91a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Dec 7 04:59:26 2007 -0600
+
+    Handle Asynchronous DDR clock on 85xx
+
+    The MPC8572 introduces the concept of an asynchronous DDR clock with
+    regards to the platform clock.
+
+    Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
+    mode.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 22abb2d2eaf7b795a6923c6273ec9cb53fda9a10
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 10:34:28 2007 -0600
+
+    Update Freescale MPC85xx ADS/CDS/MDS board config
+
+    * Removed some misc environment setup
+    * Enabled CONFIG_CMDLINE_EDITING
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 415a613babb84d5e5d5b42e8e553868c71fc3a64
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 10:47:44 2007 -0600
+
+    Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale.
+
+    Minor path corrections needed to ensure buildability.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c2d943ffbfd3359b3b45d177b437379d2cb86fbf
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 10:16:18 2007 -0600
+
+    Move the MPC8540 ADS board under board/freescale.
+
+    Minor path corrections needed to ensure buildability.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 870ceac5b3a3486c109396e005af81ae762b5710
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 10:14:50 2007 -0600
+
+    Move the MPC8560 ADS board under board/freescale.
+
+    Minor path corrections needed to ensure buildability.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit acbca876fb3fec25cd9c55b0efc81ff618ff5262
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 10:13:47 2007 -0600
+
+    Move the MPC8568 MDS board under board/freescale.
+
+    Minor path corrections needed to ensure buildability.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a853d56c59b33415304531443633808736acfc6e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 02:18:59 2007 -0600
+
+    Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xx
+
+    We already had defines for LAWAR_TRGT_IF_* that we should use
+    rather than creating new ones.  Also, added some missing defines for
+    PCIE targets.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 04db400892da37b76a585e332a0c137954ad2015
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 02:10:09 2007 -0600
+
+    Stop using immap_t on 85xx
+
+    In the future the offsets to various blocks may not be in same location.
+    Move to using CFG_MPC85xx_*_ADDR as the base of the registers
+    instead of getting it via &immap.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2714223f8e04ab3e4133ff65872eef366d90bfea
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 01:23:09 2007 -0600
+
+    Remove CONFIG_OF_FLAT_TREE related code from mpc85xx since we now use libfdt
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c480861bf000156e6a3e932c258db59ff2212dd3
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 01:06:19 2007 -0600
+
+    Update MPC8568 MDS to use libfdt
+
+    Updated the MPC8568 MDS config to use libfdt and assume use of aliases for
+    ethernet, pci, and serial for the various fixups that are done.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1563f56e0c68f6920f956382d6d13bee3f01c0f7
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date:	Wed Nov 14 15:52:06 2007 -0500
+
+    Add PCI Express support on MPC8568MDS
+
+    Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b90d25497625b90ffa3f2911a0895ca237556ff5
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 00:11:44 2007 -0600
+
+    Update MPC85xx CDS to use libfdt
+
+    Updated the MPC85xx CDS config to use libfdt and assume use of aliases for
+    ethernet, pci, and serial for the various fixups that are done.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0fd5ec66b10521a057ad73e69ab5f0f9eafba255
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Nov 28 22:54:27 2007 -0600
+
+    Update MPC8540 ADS to use libfdt
+
+    Updated the MPC8540 ADS config to use libfdt and assume use of aliases for
+    ethernet, pci, and serial for the various fixups that are done.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5ce715802f6c50dc78b3405b92f184b1e3710519
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Nov 28 22:40:31 2007 -0600
+
+    Update MPC8560 ADS to use libfdt
+
+    Updated the MPC8560 ADS config to use libfdt and assume use of aliases for
+    ethernet, pci, and serial for the various fixups that are done.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit aafeefbdb8b029f5ca2a195598d0a501a606eea9
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Wed Nov 28 00:36:33 2007 -0600
+
+    Stop using immap_t for cpm offset on 85xx
+
+    In the future the offsets to various blocks may not be in same location.
+    Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers
+    instead of getting it via &immap->im_cpm.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f59b55a5b8fcadaa99781ba48e7a38e956afa527
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Nov 27 23:25:02 2007 -0600
+
+    Stop using immap_t for guts offset on 85xx
+
+    In the future the offsets to various blocks may not be in same location.
+    Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
+    instead of getting it via &immap->im_gur.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 50c03c8cf494d91cdec39670d95337c743e16ec9
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Nov 27 22:42:34 2007 -0600
+
+    Update MPC8544 DS config
+
+    * Removed HAS_ETH2/HAS_ETH3 - MPC8544 only has TSEC1/2
+    * Removed some misc environment setup
+    * Moved to using fdtfile & fdtaddr as fdt env var names
+    * Enabled CONFIG_CMDLINE_EDITING
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit addce57e2e4c49e77ffb2020a84690713bb18b47
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Nov 26 17:12:24 2007 -0600
+
+    Update MPC8544DS to use libfdt
+
+    Updated the MPC8544DS config to use libfdt and assume use of aliases for
+    ethernet, pci, and serial for the various fixups that are done.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f852ce72f100cabd1f11c21c085a0ad8eca9fb65
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Nov 29 00:15:30 2007 -0600
+
+    Add libfdt based ft_cpu_setup for mpc85xx
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9692c2734a47f23b44a0f68042a3e2ca8d1bfb39
+Author: Stefan Roese <sr@denx.de>
+Date:	Sat Dec 8 08:25:09 2007 +0100
+
+    CFI: Coding style cleanup
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 81b20ccc2d795ae9a1199db5a50ad9c28d1e4d22
+Author: Michael Schwingen <michael@schwingen.org>
+Date:	Fri Dec 7 23:35:02 2007 +0100
+
+    CFI: support JEDEC flash roms in CFI-flash framework
+
+    The following patch adds support for non-CFI flash ROMS, by hooking into the
+    CFI flash code and using most of its code, as recently discussed here in the
+    thread "Mixing CFI and non-CFI flashs".
+
+    Signed-off-by: Michael Schwingen <michael@schwingen.org>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c01b17dd856fa120b2970f50d9598546a4927ec3
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date:	Wed Nov 28 21:24:50 2007 -0500
+
+    Conditionally compile fdt_fixup_ethernet()
+
+    Fix compiler warnings: On boards that don't have ethernets defined,
+    don't compile fdt_fixup_ethernet().
+
+commit 246d4ae6bc282bc1841224e1c5fc49dc925e0bf7
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Tue Nov 27 21:59:46 2007 -0600
+
+    Convert boards that set memory node to use fdt_fixup_memory()
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 151c8b09b35eebe8fd9139cb6c1d91c27b22f058
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Nov 26 17:06:15 2007 -0600
+
+    Added fdt_fixup_stdout that uses aliases to set linux,stdout-path
+
+    We use a combination of the serialN alias and CONFIG_CONS_INDEX to
+    determine which serial alias we should set linux,stdout-path to.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3c9272813fad84c691d0e4989bb18a3ffebdebfc
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Nov 26 14:57:45 2007 -0600
+
+    Add common memory fixup function
+
+    Add the function fdt_fixup_memory() to fixup the /memory node of the fdt
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9c9109e7fcf7ac2ca19c95b8ac54b8d1c773b157
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Nov 26 11:19:12 2007 -0600
+
+    Conditionally compile fdt_support.c
+
+    Modify common/Makefile to conditionally compile fdt_support.c based
+    on CONFIG_OF_LIBFDT.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d88e7ba0980773479e1a64badb293116071b7ef0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Mon Nov 26 10:41:40 2007 -0600
+
+    Fix build breakage due to libfdt import
+
+    The IDS8247 got lost in the update and need an API update
+    do to rename of functions in libfdt.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 28f384b171bbf1fb2dafb1046e6d259a6b2f8714
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date:	Fri Nov 23 19:43:20 2007 -0500
+
+    Add spaces around the = in the fdt print format.
+
+    Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 29592ecba3b932b9b152bcec6c0c0806412db4a3
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Fri Dec 7 01:25:38 2007 +0900
+
+    sh: Moved driver of the SuperH dependence
+
+    The composition of the directory in the drivers/ changed.
+    I moved SuperH serial driver and marubun PCMCIA driver.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 41be969f4957115ed7b1fe8b890bfaee99d7a7a2
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Dec 6 10:21:19 2007 +0100
+
+    Release v1.3.1
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit cf5933ba1e97a1cd8f5f24070e820f21d976eaeb
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Dec 6 10:21:03 2007 +0100
+
+    ADS5121 Board: fix compile problem.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8d4f040a3c15036a6ea25a9c39e7d89fefa8440d
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Mon Dec 3 00:15:28 2007 +0100
+
+    Prepare for 1.3.1-rc1
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 260eea5676ca46903a335686cc020b29c4ca46fe
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Thu Nov 29 01:21:54 2007 +0900
+
+    sh: Add SuperH boards maintainer to MAINTAINERS file
+
+    Add MS7750SE and MS7722SE's board maintainer to MAINTAINERS file.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit aa9c4f1d22701a92347c1c81f34d12c8ad3a3747
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Thu Nov 29 00:13:04 2007 +0900
+
+    sh: Add ms7750se support in MAKEALL
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit c7144373427a178332bf9754131c8c34c52c200a
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Tue Nov 27 09:44:53 2007 +0100
+
+    sh: Add sh3 and sh4 support in MAKEALL
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 130080874a3d28450098481a262c5f7c855e908d
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Nov 25 02:51:17 2007 +0900
+
+    sh: Add document for SuperH.
+
+    This document is a summary of information concerning SuperH of U-Boot.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 33ecdc2f9d64926e1a6067b28f3a0aefc3b6d23d
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Nov 25 02:39:31 2007 +0900
+
+    sh: Add marubun's pcmcia driver
+
+    Marubun pcmcia is a chip for PCMCIA used with SuperH.
+    Of course, this can be used even by other architectures.
+    When use this driver, came to be able to use CompactFlash
+    and Ethernet.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit febd86b969b975289ed948f1ac0eb9722da41ced
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Nov 25 02:32:13 2007 +0900
+
+    sh: Update SuperH SCIF driver
+
+    - Changed volatile unsigned to vu_.
+    - Changed Makefile for kconfig.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
 commit a5f601fd1b1278deae5aa9fc27a232b0d1c1c788
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Mon Nov 26 19:18:21 2007 +0100
@@ -1927,6 +2611,56 @@ Date:	Mon Sep 24 00:08:37 2007 +0200
 
     synchronizition with mainline
 
+commit eda3e1e6619ad0bee94ae4b16c99d88e77e2af13
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Sep 23 02:42:38 2007 +0900
+
+    sh: Add support command of ide with sh
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit d91ea45d15cf8e0987456bd211ffbb650824b6f1
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Sep 23 02:38:42 2007 +0900
+
+    sh: Update Makefile
+
+    Add support MS7722SE01 to Makefile.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6c0bbdccd379f5c8702af9e0765294c2fb7472a6
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Sep 23 02:31:13 2007 +0900
+
+    sh: Add support Renesas sh7722 processor and Hitachi MS7722SE01 board
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 047375bfa4c3052fa50a748da7ff89e9dad3b364
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Sep 23 02:19:24 2007 +0900
+
+    sh: Update MS7750SE01 platform
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 516ad760db3553766267ada01b7d5d727faa4bbd
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Sep 23 02:17:08 2007 +0900
+
+    sh: Remove comment out code from include/asm-sh/cpu_sh4.h
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit b02bad128669e567fce87d8df823b06a0144b8db
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Sun Sep 23 02:12:30 2007 +0900
+
+    sh: Update core code of SuperH.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
 commit 66dcad3a9a53e0766d90e0084123bd8529522fb0
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Thu Sep 20 00:04:14 2007 +0200
@@ -8634,6 +9368,24 @@ Date:	Tue May 15 07:55:42 2007 -0700
 
      Fix to compile JSE against 20070514 git of u-boot
 
+commit 69df3c4da0c93017cceb25a366e794570bd0ed98
+Author: Nobuhiro Iwamatsu <iwamatsu@rahute.(none)>
+Date:	Sun May 13 21:01:03 2007 +0900
+
+    sh: MS7750SE support.
+
+    This adds support for the Hitachi MS7750SE.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 0b135cfc2e524dc249b75057b55dd4cc09842e27
+Author: Nobuhiro Iwamatsu <iwamatsu@rahute.(none)>
+Date:	Sun May 13 20:58:00 2007 +0900
+
+    sh: First support code of SuperH.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
 commit 61936667e86a250ae12fd2dc189d3588f0a59e0b
 Author: Stefan Roese <sr@denx.de>
 Date:	Fri May 11 12:01:49 2007 +0200

MAINTAINERS

@@ -634,7 +634,7 @@ Haavard Skinnemoen <hskinnemoen@atmel.com>
 	ATSTK1002		AT32AP7000
 	ATSTK1003		AT32AP7001
 	ATSTK1004		AT32AP7002
- 
+
 #########################################################################
 # SuperH Systems:							#
 #									#

board/ms7722se/Makefile

@@ -1,7 +1,7 @@
 #
 # Copyright (C) 2007
 # Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-#     
+#
 # Copyright (C) 2007
 # Kenati Technologies, Inc.
 #

board/ms7722se/config.mk

@@ -29,4 +29,3 @@
 #
 
 TEXT_BASE = 0x8FFC0000
-

board/ms7722se/lowlevel_init.S

@@ -1,7 +1,7 @@
 /*
  * Copyright (C) 2007
  * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *    
+ *
  * Copyright (C) 2007
  * Kenati Technologies, Inc.
  *
@@ -52,19 +52,19 @@ lowlevel_init:
 	mov.l	r0, @r1
 
 	mov.l	MSTPCR0_A, r1	! Address of Power Control Register 0
-	mov.l	MSTPCR0_D, r0	! 
+	mov.l	MSTPCR0_D, r0	!
 	mov.l	r0, @r1
 
 	mov.l	MSTPCR2_A, r1	! Address of Power Control Register 2
-	mov.l	MSTPCR2_D, r0	! 
+	mov.l	MSTPCR2_D, r0	!
 	mov.l	r0, @r1
 
-	mov.l	SBSCR_A, r1	! 
-	mov.w	SBSCR_D, r0	! 
+	mov.l	SBSCR_A, r1	!
+	mov.w	SBSCR_D, r0	!
 	mov.w	r0, @r1
 
-	mov.l	PSCR_A, r1	! 
-	mov.w	PSCR_D, r0	! 
+	mov.l	PSCR_A, r1	!
+	mov.w	PSCR_D, r0	!
 	mov.w	r0, @r1
 
 !	mov.l	RWTCSR_A, r1	! 0xA4520004 (Watchdog Control / Status Register)
@@ -80,7 +80,7 @@ lowlevel_init:
 	mov.w	r0, @r1
 
 	mov.l	FRQCR_A, r1		! 0xA4150000 Frequency control register
-	mov.l	FRQCR_D, r0	! 
+	mov.l	FRQCR_D, r0	!
 	mov.l	r0, @r1
 
 	mov.l	CCR_A, r1		! Address of Cache Control Register
@@ -200,11 +200,9 @@ bsc_init:
 	rts
 	mov	#0, r0
 
-
-
 	.align	2
 
-CCR_A:		.long	CCR			
+CCR_A:		.long	CCR
 MMUCR_A:	.long	MMUCR
 MSTPCR0_A:	.long	MSTPCR0
 MSTPCR2_A:	.long	MSTPCR2
@@ -223,7 +221,7 @@ FRQCR_D:	.long	0x07022538
 
 PSELA_A:	.long   0xa405014E
 PSELA_D:	.word   0x0A10
-        .align 2
+	.align 2
 
 DRVCR_A:	.long   0xa405018A
 DRVCR_D:	.word   0x0554

board/ms7722se/ms7722se.c

@@ -4,7 +4,7 @@
  *
  * Copyright (C) 2007
  * Kenati Technologies, Inc.
- * 
+ *
  * board/ms7722se/ms7722se.c
  *
  * This program is free software; you can redistribute it and/or
@@ -57,4 +57,3 @@ void led_set_state (unsigned short value)
 {
 	*((volatile unsigned short *) LED_BASE) = (value & 0xFF);
 }
-

board/ms7722se/u-boot.lds

@@ -32,19 +32,19 @@ SECTIONS
 	   Although size of SDRAM can be either 16 or 32 MBytes,
 	   we assume 16 MBytes (ie ignore upper half if the full
 	   32 MBytes is present).
-	   
+
 	   NOTE: This address must match with the definition of
 	   TEXT_BASE in config.mk (in this directory).
-	   
+
 	*/
 	. = 0x8C000000 + (64*1024*1024) - (256*1024);
-	
+
 	PROVIDE (reloc_dst = .);
 
 	PROVIDE (_ftext = .);
 	PROVIDE (_fcode = .);
 	PROVIDE (_start = .);
-	
+
 	.text :
 	{
 		cpu/sh4/start.o		(.text)
@@ -89,7 +89,7 @@ SECTIONS
 	}
 	PROVIDE (__u_boot_cmd_end = .);
 
-	PROVIDE (reloc_dst_end = .); 
+	PROVIDE (reloc_dst_end = .);
 	/* _reloc_dst_end = .; */
 
 	PROVIDE (bss_start = .);
@@ -103,4 +103,3 @@ SECTIONS
 
 	PROVIDE (_end = .);
 }
-

board/ms7750se/lowlevel_init.S

@@ -2,8 +2,8 @@
  modified from SH-IPL+g
  Renesaso SuperH / Solution Enginge MS775xSE01 BSC setting.
 
- Support CPU : SH7750/SH7750S/SH7750R/SH7751/SH7751R 
- 
+ Support CPU : SH7750/SH7750S/SH7750R/SH7751/SH7751R
+
  Coyright (c) 2007 Nobuhiro Iwamatsu <iwmatsu@nigauri.org>
 
  * See file CREDITS for list of people who contributed to this
@@ -102,7 +102,7 @@ init_bsc:
 	mov	#0,r0
 	mov.b	r0,@r1
 
-	! Do you need PCMCIA setting?	
+	! Do you need PCMCIA setting?
 	! If so, please add the lines here...
 
 	mov.l	RTCNT_A,r1	/* RTCNT Address */
@@ -165,7 +165,7 @@ WCR2_A:		.long	WCR2
 WCR2_D:		.long	WCR2_D_VALUE	/* Per-area access and burst wait states */
 WCR3_A:		.long	WCR3
 WCR3_D:		.long	WCR3_D_VALUE	/* Address setup and data hold cycles */
-RTCSR_A:	.long	RTCSR	
+RTCSR_A:	.long	RTCSR
 RTCSR_D:	.long	0xA518		/* RTCSR Write Code A5h Data 18h */
 RTCNT_A:	.long	RTCNT
 RTCNT_D:	.long	0xA500		/* RTCNT Write Code A5h Data 00h */
@@ -177,4 +177,3 @@ MCR_D1:		.long	MCR_D1_VALUE
 MCR_D2:		.long	MCR_D2_VALUE
 RFCR_A:		.long	RFCR
 RFCR_D:		.long	0xA400		/* RFCR Write Code A4h Data 00h */
-

board/ms7750se/ms7750se.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007 
+ * Copyright (C) 2007
  * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  *
  * See file CREDITS for list of people who contributed to this

board/ms7750se/u-boot.lds

@@ -32,19 +32,19 @@ SECTIONS
 	   Although size of SDRAM can be either 16 or 32 MBytes,
 	   we assume 16 MBytes (ie ignore upper half if the full
 	   32 MBytes is present).
-	   
+
 	   NOTE: This address must match with the definition of
 	   TEXT_BASE in config.mk (in this directory).
-	   
+
 	*/
 	. = 0x8C000000 + (64*1024*1024) - (256*1024);
-	
+
 	PROVIDE (reloc_dst = .);
 
 	PROVIDE (_ftext = .);
 	PROVIDE (_fcode = .);
 	PROVIDE (_start = .);
-	
+
 	.text :
 	{
 		cpu/sh4/start.o		(.text)
@@ -89,7 +89,7 @@ SECTIONS
 	}
 	PROVIDE (__u_boot_cmd_end = .);
 
-	PROVIDE (reloc_dst_end = .); 
+	PROVIDE (reloc_dst_end = .);
 	/* _reloc_dst_end = .; */
 
 	PROVIDE (bss_start = .);
@@ -103,4 +103,3 @@ SECTIONS
 
 	PROVIDE (_end = .);
 }
-

cpu/sh4/cache.c

@@ -30,36 +30,36 @@
  * Jump to P2 area.
  * When handling TLB or caches, we need to do it from P2 area.
  */
-#define jump_to_P2()                    \
-  do {                                    \
+#define jump_to_P2()			\
+  do {					\
     unsigned long __dummy;		\
-    __asm__ __volatile__(			\
-                "mov.l  1f, %0\n\t"     \
-                "or     %1, %0\n\t"     \
-                "jmp    @%0\n\t"        \
-                " nop\n\t"              \
-                ".balign 4\n"           \
-                "1:     .long 2f\n"     \
-                "2:"                    \
-                : "=&r" (__dummy)       \
-                : "r" (0x20000000));    \
+    __asm__ __volatile__(		\
+		"mov.l	1f, %0\n\t"	\
+		"or	%1, %0\n\t"	\
+		"jmp	@%0\n\t"	\
+		" nop\n\t"		\
+		".balign 4\n"		\
+		"1:	.long 2f\n"	\
+		"2:"			\
+		: "=&r" (__dummy)	\
+		: "r" (0x20000000));	\
   } while (0)
 
 /*
  * Back to P1 area.
  */
-#define back_to_P1()                                    \
-  do {                                                    \
-    unsigned long __dummy;                          \
-    __asm__ __volatile__(                           \
-                "nop;nop;nop;nop;nop;nop;nop\n\t"       \
-                "mov.l  1f, %0\n\t"                     \
-                "jmp    @%0\n\t"                        \
-                " nop\n\t"                              \
-                ".balign 4\n"                           \
-                "1:     .long 2f\n"                     \
-                "2:"                                    \
-                : "=&r" (__dummy));                     \
+#define back_to_P1()					\
+  do {							\
+    unsigned long __dummy;				\
+    __asm__ __volatile__(				\
+		"nop;nop;nop;nop;nop;nop;nop\n\t"	\
+		"mov.l	1f, %0\n\t"			\
+		"jmp	@%0\n\t"			\
+		" nop\n\t"				\
+		".balign 4\n"				\
+		"1:	.long 2f\n"			\
+		"2:"					\
+		: "=&r" (__dummy));			\
   } while (0)
 
 #define CACHE_VALID       1

cpu/sh4/config.mk

@@ -4,7 +4,7 @@
 #
 # (C) Copyright 2007
 # Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-#   
+#
 # See file CREDITS for list of people who contributed to this
 # project.
 #

cpu/sh4/cpu.c

@@ -66,7 +66,7 @@ void icache_disable (void)
 
 int icache_status (void)
 {
-	return 0; 
+	return 0;
 }
 
 void dcache_enable (void)

cpu/sh4/interrupts.c

@@ -25,7 +25,7 @@
 
 int interrupt_init (void)
 {
-	return 0; 
+	return 0;
 }
 
 void enable_interrupts (void)
@@ -33,7 +33,6 @@ void enable_interrupts (void)
 
 }
 
-int disable_interrupts (void){ 
-	return 0; 
+int disable_interrupts (void){
+	return 0;
 }
-

cpu/sh4/start.S

@@ -33,21 +33,21 @@ _start:
 	bsr	1f
 	nop
 1:	sts	pr, r5
-	mov.l	._reloc_dst, r4	
-	add	#(_start-1b), r5	
-	mov.l	._reloc_dst_end, r6	
+	mov.l	._reloc_dst, r4
+	add	#(_start-1b), r5
+	mov.l	._reloc_dst_end, r6
 
 2:	mov.l	@r5+, r1
 	mov.l	r1, @r4
 	add	#4, r4
 	cmp/hs	r6, r4
 	bf	2b
-	
-	mov.l	._bss_start, r4	
-	mov.l	._bss_end, r5		
+
+	mov.l	._bss_start, r4
+	mov.l	._bss_end, r5
 	mov	#0, r1
 
-3:	mov.l	r1, @r4			/* bss clear */	
+3:	mov.l	r1, @r4			/* bss clear */
 	add	#4, r4
 	cmp/hs	r5, r4
 	bf	3b
@@ -56,8 +56,8 @@ _start:
 	mov.l	._stack_init, r15	/* stack */
 
 	mov.l	._sh_generic_init, r0
-	jsr	@r0			
-	nop				
+	jsr	@r0
+	nop
 
 loop:
 	bra	loop
@@ -72,4 +72,3 @@ loop:
 ._gd_init:		.long	(_start - CFG_GBL_DATA_SIZE)
 ._stack_init:		.long	(_start - CFG_GBL_DATA_SIZE - CFG_MALLOC_LEN - 16)
 ._sh_generic_init:	.long	sh_generic_init
-

cpu/sh4/watchdog.c

@@ -32,12 +32,12 @@ static void cnt_write (unsigned char value){
 	while (csr_read() & (1 << 5)) {
 		/* delay */
 	}
-	*((volatile unsigned short *)(WDT_BASE + 0x00)) 
+	*((volatile unsigned short *)(WDT_BASE + 0x00))
 		= ((unsigned short) value) | 0x5A00;
 }
 
 static void csr_write (unsigned char value){
-	*((volatile unsigned short *)(WDT_BASE + 0x04)) 
+	*((volatile unsigned short *)(WDT_BASE + 0x04))
 		= ((unsigned short) value) | 0xA500;
 }
 
@@ -48,5 +48,3 @@ void reset_cpu (unsigned long ignored)
 {
 	while(1);
 }
-
-

doc/README.marubun-pcmcia

@@ -1,59 +1,59 @@
 
 U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver
 	Last update 21/11/2007 by Nobuhiro Iwamatsu
-	
+
 ========================================================================================
 
-0. What's this? 
+0. What's this?
     This driver supports MARUBUN MR-SHPC-01.
 	url: http://www.marubun.co.jp/product/semicon/devices/qgc18e0000002n2z.html
 	(Sorry Japanese only.)
 
-    This chip is used with SuperH well, and adopted by the 
-    reference board. 
+    This chip is used with SuperH well, and adopted by the
+    reference board.
 	ex. * MS7750SE01
 		* MS7722SE01
-		* other 
-		
+		* other
+
     This chip doesn't support CardBus.
 
-1. base source code 
+1. base source code
     The code is based on sources from the Linux kernel
-    	( arch/sh/kernel/cf-enabler.c ). 
+    	( arch/sh/kernel/cf-enabler.c ).
 
-2. How to use 
+2. How to use
     The options you have to specify in the config file are (with the
     value for my board as an example):
 
     * CONFIG_MARUBUN_PCCARD
 	If you want to use this device driver, should define CONFIG_MARUBUN_PCCARD.
 	ex. 	#define CONFIG_MARUBUN_PCCARD
-		
+
     * CONFIG_PCMCIA_SLOT_A
     	Most devices have only one slot. You should define CONFIG_PCMCIA_SLOT_A .
 	ex.	#define CONFIG_PCMCIA_SLOT_A    1
 
     * CFG_MARUBUN_MRSHPC
     	This is MR-SHPC-01 PCMCIA controler base address.
-	You should do the setting matched to your environment. 
-	ex.  #define CFG_MARUBUN_MRSHPC 0xb03fffe0 
+	You should do the setting matched to your environment.
+	ex.  #define CFG_MARUBUN_MRSHPC 0xb03fffe0
 	     ( for MS7722SE01 environment )
 
     * CFG_MARUBUN_MW1
 	This is MR-SHPC-01 memory window base address.
-	You should do the setting matched to your environment. 
+	You should do the setting matched to your environment.
 	ex. #define CFG_MARUBUN_MW1 0xb0400000
 	     ( for MS7722SE01 environment )
-	
+
     * CFG_MARUBUN_MW1
 	This is MR-SHPC-01 attribute window base address.
-	You should do the setting matched to your environment. 
+	You should do the setting matched to your environment.
 	ex. #define CFG_MARUBUN_MW2 0xb0500000
 	     ( for MS7722SE01 environment )
-	     
+
     * CFG_MARUBUN_MW1
 	This is MR-SHPC-01 I/O window base address.
-	You should do the setting matched to your environment. 
+	You should do the setting matched to your environment.
 	ex. #define CFG_MARUBUN_IO  0xb0600000
 	     ( for MS7722SE01 environment )
 

doc/README.sh

@@ -1,5 +1,5 @@
 
-U-Boot for Renesas SuperH 
+U-Boot for Renesas SuperH
 	Last update 08/10/2007 by Nobuhiro Iwamatsu
 
 ================================================================================
@@ -9,10 +9,10 @@ U-Boot for Renesas SuperH
 
 ================================================================================
 1. Overview
-	SuperH has an original boot loader. However, source code is dirty, and 
+	SuperH has an original boot loader. However, source code is dirty, and
 	maintenance is not done.
-	To improve sharing and the maintenance of the code, Nobuhiro Iwamatsu 
-	started the porting to u-boot in 2007. 
+	To improve sharing and the maintenance of the code, Nobuhiro Iwamatsu
+	started the porting to u-boot in 2007.
 
 ================================================================================
 2. Supported CPUs
@@ -33,13 +33,13 @@ U-Boot for Renesas SuperH
 
 	** README **
 		In SuperH, S-record and binary of made u-boot work on the memory.
-		When u-boot is written in the flash, it is necessary to change the 
-		address by using 'objcopy'.  
+		When u-boot is written in the flash, it is necessary to change the
+		address by using 'objcopy'.
 		ex) shX-linux-objcopy -Ibinary -Osrec u-boot.bin u-boot.flash.srec
-	
+
 ================================================================================
 4. Compiler
-	You can use the following of u-boot to compile. 
+	You can use the following of u-boot to compile.
 		- SuperH Linux Open site
 			http://www.superh-linux.org/
 		- KPIT GNU tools
@@ -52,11 +52,10 @@ U-Boot for Renesas SuperH
 			- SH7710/SH7712 (SH3)
 			- SH7780(SH4)
 			- SH7785(SH4)
-		
+
 		5.2. Boards
 			- Many boards ;-)
 
 ================================================================================
 Copyright (c) 2007
     Nobuhiro Iwamatsu <iwamatsu@nigaur.org>
-

drivers/pcmcia/marubun_pcmcia.c

@@ -17,8 +17,8 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
- *              
- */ 
+ *
+ */
 
 #include <common.h>
 #include <config.h>
@@ -34,7 +34,7 @@
 #endif
 
 #if	defined(CONFIG_PCMCIA)  \
-	        && (defined(CONFIG_MARUBUN_PCCARD)) 
+	        && (defined(CONFIG_MARUBUN_PCCARD))
 
 /* MR-SHPC-01 register */
 #define MRSHPC_MODE   	(CFG_MARUBUN_MRSHPC + 4)
@@ -79,14 +79,14 @@ int pcmcia_on (void)
 		outw(0x0b00,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 1 */
 	else
 		outw(0x0300,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 0 */
-	
+
 	/* attribute window open */
 	outw(0x8a85,MRSHPC_MW1CR1); /* window 0xb8500000 */
 	if ((inw(MRSHPC_CSR) & 0x4000) != 0)
 		outw(0x0a00,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 1 */
 	else
 		outw(0x0200,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 0 */
-	
+
 	/* I/O window open */
 	outw(0x8a86,MRSHPC_IOWCR1); /* I/O window 0xb8600000 */
 	outw(0x0008,MRSHPC_CDCR);   /* I/O card mode */
@@ -94,7 +94,7 @@ int pcmcia_on (void)
 		outw(0x0a00,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1 */
 	else
 		outw(0x0200,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0 */
-	
+
 	outw(0x0000,MRSHPC_ISR);
 	outw(0x2000,MRSHPC_ICR);
 	outb(0x00,(CFG_MARUBUN_MW2 + 0x206));

drivers/serial/serial_sh.c

@@ -1,7 +1,7 @@
 /*
  * SuperH SCIF device driver.
  * Copyright (c) 2007 Nobuhiro Iwamatsu
- * 
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -31,7 +31,7 @@
 #endif
 
 #define SCSMR 	(vu_short *)(SCIF_BASE + 0x0)
-#define SCBRR 	(vu_char  *)(SCIF_BASE + 0x4) 
+#define SCBRR 	(vu_char  *)(SCIF_BASE + 0x4)
 #define SCSCR 	(vu_short *)(SCIF_BASE + 0x8)
 #define SCFTDR 	(vu_char  *)(SCIF_BASE + 0xC)
 #define SCFSR 	(vu_short *)(SCIF_BASE + 0x10)
@@ -51,7 +51,7 @@
 #endif
 
 #define SCR_RE 		(1 << 4)
-#define SCR_TE 		(1 << 5) 
+#define SCR_TE 		(1 << 5)
 #define FCR_RFRST	(1 << 1) /* RFCL */
 #define FCR_TFRST	(1 << 2) /* TFCL */
 #define FSR_DR   	(1 << 0)
@@ -69,7 +69,7 @@ void serial_setbrg (void)
 	DECLARE_GLOBAL_DATA_PTR;
 	int divisor = gd->baudrate * 32;
 
-	*SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) / 
+	*SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) /
 						(gd->baudrate * 32) - 1;
 }
 

examples/stubs.c

@@ -132,7 +132,7 @@ gd_t *global_data;
  */
 #define EXPORT_FUNC(x)			\
 	asm volatile (			\
-"       .globl _" #x "\n_"		\
+"	.globl _" #x "\n_"		\
 #x ":\n"				\
 "	P0 = [P5 + %0]\n"		\
 "	P0 = [P0 + %1]\n"		\
@@ -155,17 +155,17 @@ gd_t *global_data;
 /*
  * r13 holds the pointer to the global_data. r1 is a call clobbered.
  */
-#define EXPORT_FUNC(x)                  \
-        asm volatile (                  \
-		"       .align  2\n"                    \
-		"       .globl " #x "\n"                \
-		#x ":\n"                                \
-		"       mov     r13, r1\n"              \
-		"       add     %0, r1\n"               \
-		"       add     %1, r1\n"               \
-		"       jmp     @r1\n"                  \
-		"       nop\n"                          \
-		"       nop\n"                          \
+#define EXPORT_FUNC(x)					\
+	asm volatile (					\
+		"	.align	2\n"			\
+		"	.globl " #x "\n"		\
+		#x ":\n"				\
+		"	mov	r13, r1\n"		\
+		"	add	%0, r1\n"		\
+		"	add	%1, r1\n"		\
+		"	jmp	@r1\n"			\
+		"	nop\n"				\
+		"	nop\n"				\
 		: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r1");
 #else
 #error stubs definition missing for this architecture

include/asm-sh/bitops.h

@@ -2,7 +2,6 @@
 #define __ASM_SH_BITOPS_H
 
 #ifdef __KERNEL__
-//#include <asm/system.h>
 #include <asm/irqflags.h>
 /* For __swab32 */
 #include <asm/byteorder.h>
@@ -99,8 +98,6 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
 	return retval;
 }
 
-//#include <asm-generic/bitops/non-atomic.h>
-
 static inline unsigned long ffz(unsigned long word)
 {
 	unsigned long result;
@@ -121,46 +118,34 @@ static inline unsigned long ffz(unsigned long word)
  *
  * Undefined if no bit exists, so code should check against 0 first.
  */
-static inline int ffs(int x)
+static inline int ffs (int x)
 {
-  int r = 1;
-
-  if (!x)
-    return 0;
-  if (!(x & 0xffff)) {
-    x >>= 16;
-    r += 16;
-  }
-  if (!(x & 0xff)) {
-    x >>= 8;
-    r += 8;
-  }
-  if (!(x & 0xf)) {
-    x >>= 4;
-    r += 4;
-  }
-  if (!(x & 3)) {
-    x >>= 2;
-    r += 2;
-  }
-  if (!(x & 1)) {
-    x >>= 1;
-    r += 1;
-  }
-  return r;
+	int r = 1;
+
+	if (!x)
+		return 0;
+	if (!(x & 0xffff)) {
+		x >>= 16;
+		r += 16;
+	}
+	if (!(x & 0xff)) {
+		x >>= 8;
+		r += 8;
+	}
+	if (!(x & 0xf)) {
+		x >>= 4;
+		r += 4;
+	}
+	if (!(x & 3)) {
+		x >>= 2;
+		r += 2;
+	}
+	if (!(x & 1)) {
+		x >>= 1;
+		r += 1;
+	}
+	return r;
 }
-
-#if 0
-#include <asm-generic/bitops/find.h>
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/ext2-non-atomic.h>
-#include <asm-generic/bitops/ext2-atomic.h>
-#include <asm-generic/bitops/minix.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-#endif
 #endif /* __KERNEL__ */
 
 #endif /* __ASM_SH_BITOPS_H */

include/asm-sh/byteorder.h

@@ -28,4 +28,3 @@
 #endif
 
 #endif
-

include/asm-sh/cpu_sh7722.h

@@ -31,13 +31,13 @@
 #define INTEVT		0xFF000028
 
 /*	MMU	*/
-#define PTEH		0xFF000000 
-#define PTEL		0xFF000004 
-#define TTB		0xFF000008 
-#define TEA		0xFF00000C 
-#define MMUCR		0xFF000010 
-#define PASCR		0xFF000070 
-#define IRMCR		0xFF000078 
+#define PTEH		0xFF000000
+#define PTEL		0xFF000004
+#define TTB		0xFF000008
+#define TEA		0xFF00000C
+#define MMUCR		0xFF000010
+#define PASCR		0xFF000070
+#define IRMCR		0xFF000078
 
 /*	CACHE	*/
 #define CCR		0xFF00001C
@@ -325,7 +325,7 @@
 #define SPICR1      0xA4420030
 
 /*	SCIF	*/
-/* 
+/*
 #define SCSMR       0xFFE00000
 #define SCBRR       0xFFE00004
 #define SCSCR       0xFFE00008
@@ -1334,4 +1334,4 @@
 #define SDDRL       0xFC11000A
 #define SDINT       0xFC110018
 
-#endif /* _ASM_CPU_SH7722_H_ */ 
+#endif /* _ASM_CPU_SH7722_H_ */

include/asm-sh/cpu_sh7750.h

@@ -1,7 +1,7 @@
 /*
  * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  *
- * SH7750/SH7750S/SH7750R/SH7751/SH7751R 
+ * SH7750/SH7750S/SH7750R/SH7751/SH7751R
  *  Internal I/O register
  *
  * This program is free software; you can redistribute it and/or

include/asm-sh/posix_types.h

@@ -68,7 +68,7 @@ static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
 
 #undef	__FD_ISSET
 static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
-{ 
+{
 	unsigned long __tmp = __fd / __NFDBITS;
 	unsigned long __rem = __fd % __NFDBITS;
 	return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;

include/asm-sh/u-boot.h

@@ -25,7 +25,6 @@
 #ifndef __ASM_SH_U_BOOT_H_
 #define __ASM_SH_U_BOOT_H_
 
-
 typedef struct bd_info {
 	unsigned long   bi_memstart;    /* start of DRAM memory */
 	unsigned long   bi_memsize;     /* size  of DRAM memory in bytes */
@@ -41,4 +40,3 @@ typedef struct bd_info {
 } bd_t;
 
 #endif
-

include/configs/ms7722se.h

@@ -25,7 +25,7 @@
 #ifndef __MS7722SE_H
 #define __MS7722SE_H
 
-#undef DEBUG 
+#undef DEBUG
 #define CONFIG_SH		1
 #define CONFIG_SH4		1
 #define CONFIG_CPU_SH7722	1
@@ -56,7 +56,6 @@
 /* MEMORY */
 #define MS7722SE_SDRAM_BASE	(0x8C000000)
 #define MS7722SE_FLASH_BASE_1	(0xA0000000)
-//#define MS7722SE_FLASH_BASE_1	(0xA1000000)
 #define MS7722SE_FLASH_BANK_SIZE	(8*1024 * 1024)
 
 #define CFG_LONGHELP				/* undef to save memory	*/
@@ -87,12 +86,12 @@
 
 #define CFG_LOAD_ADDR	(CFG_SDRAM_BASE + 4 * 1024 * 1024)	/* default load address for scripts ?!? */
 
-#define CFG_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image 
+#define CFG_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image
 						   	in Flash (NOT run time address in SDRAM) ?!? */
 #define CFG_MONITOR_LEN	(128 * 1024)		/* */
 #define CFG_MALLOC_LEN	(256 * 1024)		/* Size of DRAM reserved for malloc() use */
 #define CFG_GBL_DATA_SIZE	(256)		/* size in bytes reserved for initial data */
-#define CFG_BOOTMAPSZ	(8 * 1024 * 1024)	
+#define CFG_BOOTMAPSZ	(8 * 1024 * 1024)
 
 /* FLASH */
 #define CFG_FLASH_CFI
@@ -102,7 +101,7 @@
 
 #define CFG_FLASH_BASE		(MS7722SE_FLASH_BASE_1)	/* Physical start address of Flash memory */
 
-#define CFG_MAX_FLASH_SECT	150		/* Max number of sectors on each 
+#define CFG_MAX_FLASH_SECT	150		/* Max number of sectors on each
 				   			Flash chip */
 
 /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
@@ -131,7 +130,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */		
+#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
 #define CFG_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
 
 #endif	/* __MS7722SE_H */

include/configs/ms7750se.h

@@ -37,7 +37,7 @@
 /*
  * Command line configuration.
  */
-//#include <config_cmd_default.h>
+/*#include <config_cmd_default.h>*/
 
 #define CONFIG_CMD_DFL
 #define CONFIG_CMD_FLASH
@@ -56,7 +56,7 @@
 #define CFG_SDRAM_BASE		(0x8C000000)
 #define CFG_SDRAM_SIZE		(64 * 1024 * 1024)
 
-#define CFG_LONGHELP		
+#define CFG_LONGHELP
 #define CFG_PROMPT		"=> "
 #define CFG_CBSIZE		256
 #define CFG_PBSIZE		256
@@ -71,7 +71,7 @@
 /* NOR Flash */
 /* #define CFG_FLASH_BASE		(0xA1000000)*/
 #define CFG_FLASH_BASE		(0xA0000000)
-#define CFG_MAX_FLASH_BANKS	(1)	/* Max number of 
+#define CFG_MAX_FLASH_BANKS	(1)	/* Max number of
 				 	 * Flash memory banks
 				 	 */
 #define CFG_MAX_FLASH_SECT	142

lib_sh/Makefile

@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(ARCH).a
 
-SOBJS	= 
+SOBJS	=
 
 COBJS	= board.o sh_linux.o # time.o
 

lib_sh/board.c

@@ -47,7 +47,7 @@ static void mem_malloc_init (void)
 	mem_malloc_start = (TEXT_BASE - CFG_GBL_DATA_SIZE - CFG_MALLOC_LEN);
 	mem_malloc_end = (mem_malloc_start + CFG_MALLOC_LEN - 16);
 	mem_malloc_brk = mem_malloc_start;
-	memset ((void *) mem_malloc_start, 0, 
+	memset ((void *) mem_malloc_start, 0,
 		(mem_malloc_end - mem_malloc_start));
 }
 
@@ -191,7 +191,7 @@ void sh_generic_init (void)
 	puts ("Net:   ");
 	eth_initialize(gd->bd);
 
-        if ((s = getenv ("bootfile")) != NULL) {
+	if ((s = getenv ("bootfile")) != NULL) {
 		copy_filename (BootFile, s, sizeof (BootFile));
 	}
 #endif /* CONFIG_CMD_NET */

lib_sh/sh_linux.c

@@ -28,7 +28,7 @@
 extern image_header_t header;	/* common/cmd_bootm.c */
 
 /* The SH kernel reads arguments from the empty zero page at location
- * 0 at the start of SDRAM. The following are copied from 
+ * 0 at the start of SDRAM. The following are copied from
  * arch/sh/kernel/setup.c and may require tweaking if the kernel sources
  * change.
  */
@@ -72,4 +72,3 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
 
 	kernel();
 }
-