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@@ -32,10 +32,8 @@
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#include <ioports.h>
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#include <spd.h>
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#include <miiphy.h>
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-
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-#if defined(CONFIG_OF_FLAT_TREE)
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-#include <ft_build.h>
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-#endif
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+#include <libfdt.h>
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+#include <fdt_support.h>
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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extern void ddr_enable_ecc(unsigned int dram_size);
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@@ -547,35 +545,25 @@ pci_init_board(void)
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}
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-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
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-void
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-ft_soc_setup(void *blob, bd_t *bd)
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-{
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- u32 *p;
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- int len;
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-
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- p = ft_get_prop(blob, "/" OF_SOC "/cpm@e0000000/brg-frequency", &len);
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-
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- if (p != NULL)
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- *p = cpu_to_be32(bd->bi_brgfreq);
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-
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- p = ft_get_prop(blob,
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- "/" OF_SOC "/cpm@e0000000/scc@91a00/current-speed",
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- &len);
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- if (p != NULL)
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- *p = cpu_to_be32(bd->bi_baudrate);
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-
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- p = ft_get_prop(blob,
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- "/" OF_SOC "/cpm@e0000000/scc@91a20/current-speed",
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- &len);
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- if (p != NULL)
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- *p = cpu_to_be32(bd->bi_baudrate);
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-}
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-
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+#if defined(CONFIG_OF_BOARD_SETUP)
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void
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ft_board_setup(void *blob, bd_t *bd)
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{
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+ int node, tmp[2];
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+ const char *path;
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+
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ft_cpu_setup(blob, bd);
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- ft_soc_setup(blob, bd);
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+
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+ node = fdt_path_offset(blob, "/aliases");
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+ tmp[0] = 0;
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+ if (node >= 0) {
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+#ifdef CONFIG_PCI
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+ path = fdt_getprop(blob, node, "pci0", NULL);
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+ if (path) {
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+ tmp[1] = hose.last_busno - hose.first_busno;
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+ do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
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+ }
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+#endif
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+ }
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}
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#endif
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