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@@ -1,5 +1,5 @@
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/*
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- * (C) Copyright 2001, 2002
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+ * (C) Copyright 2001-2008
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* Keith Outwater, keith_outwater@mvis.com`
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*
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@@ -60,19 +60,19 @@
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/*
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* RTC control register bits
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*/
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-#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
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-#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
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-#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
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-#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
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-#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
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-#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
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+#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
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+#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
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+#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
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+#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
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+#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
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+#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
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/*
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* RTC status register bits
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*/
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-#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
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-#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
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-#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
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+#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
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+#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
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+#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
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static uchar rtc_read (uchar reg);
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@@ -163,7 +163,7 @@ void rtc_set (struct rtc_time *tmp)
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*/
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#ifdef CFG_RTC_DS1337_NOOSC
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#define RTC_DS1337_RESET_VAL \
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- (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
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+ (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
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#else
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#define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
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#endif
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