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@@ -51,12 +51,12 @@
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#define CFG_8xx_CPUCLK_MIN 40000000
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#define CFG_8xx_CPUCLK_MIN 40000000
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#define CFG_8xx_CPUCLK_MAX 133000000
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#define CFG_8xx_CPUCLK_MAX 133000000
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-#define CFG_RESET_ADDRESS 0xf8000000
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+#define CFG_RESET_ADDRESS 0xC0000000
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_EARLY_INIT_F
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+#define CONFIG_LAST_STAGE_INIT
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-
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-#if 1
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+#if 0
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#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
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#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
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#else
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#else
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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@@ -89,7 +89,6 @@
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| CFG_CMD_JFFS2 \
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| CFG_CMD_JFFS2 \
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| CFG_CMD_PING \
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| CFG_CMD_PING \
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| CFG_CMD_DHCP \
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| CFG_CMD_DHCP \
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- | CFG_CMD_IMMAP \
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| CFG_CMD_I2C \
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| CFG_CMD_I2C \
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| CFG_CMD_MII)
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| CFG_CMD_MII)
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/* & ~( CFG_CMD_NET)) */
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/* & ~( CFG_CMD_NET)) */
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@@ -248,7 +247,7 @@
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*-----------------------------------------------------------------------
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*-----------------------------------------------------------------------
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* PCMCIA config., multi-function pin tri-state
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* PCMCIA config., multi-function pin tri-state
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*/
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*/
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-#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
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+#define CFG_SIUMCR (SIUMCR_FRC)
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* TBSCR - Time Base Status and Control 11-26
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* TBSCR - Time Base Status and Control 11-26
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@@ -393,7 +392,7 @@
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#endif /* CONFIG_SPC1920_HPI_TEST */
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#endif /* CONFIG_SPC1920_HPI_TEST */
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/*
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/*
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- * PLD CS5
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+ * PLD CS5
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*/
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*/
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#define CFG_SPC1920_PLD_BASE 0x80000000
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#define CFG_SPC1920_PLD_BASE 0x80000000
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#define CFG_PRELIM_OR5_AM 0xfff00000
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#define CFG_PRELIM_OR5_AM 0xfff00000
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