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@@ -1,30 +1,31 @@
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/*
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/*
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-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
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-*
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-* See file CREDITS for list of people who contributed to this
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-* project.
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-*
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-* This program is free software; you can redistribute it and/or
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-* modify it under the terms of the GNU General Public License as
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-* published by the Free Software Foundation; either version 2 of
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-* the License, or (at your option) any later version.
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-*
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-* This program is distributed in the hope that it will be useful,
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-* but WITHOUT ANY WARRANTY; without even the implied warranty of
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-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-* GNU General Public License for more details.
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-*
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-* You should have received a copy of the GNU General Public License
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-* along with this program; if not, write to the Free Software
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-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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-* MA 02111-1307 USA
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-*/
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+ * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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#include <ppc_asm.tmpl>
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#include <ppc_asm.tmpl>
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#include <config.h>
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#include <config.h>
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/* General */
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/* General */
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#define TLB_VALID 0x00000200
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#define TLB_VALID 0x00000200
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+#define _256M 0x10000000
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/* Supported page sizes */
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/* Supported page sizes */
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@@ -32,10 +33,11 @@
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#define SZ_4K 0x00000010
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#define SZ_4K 0x00000010
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#define SZ_16K 0x00000020
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#define SZ_16K 0x00000020
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#define SZ_64K 0x00000030
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#define SZ_64K 0x00000030
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-#define SZ_256K 0x00000040
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+#define SZ_256K 0x00000040
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#define SZ_1M 0x00000050
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#define SZ_1M 0x00000050
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+#define SZ_8M 0x00000060
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#define SZ_16M 0x00000070
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#define SZ_16M 0x00000070
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-#define SZ_256M 0x00000090
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+#define SZ_256M 0x00000090
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/* Storage attributes */
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/* Storage attributes */
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#define SA_W 0x00000800 /* Write-through */
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#define SA_W 0x00000800 /* Write-through */
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@@ -54,7 +56,7 @@
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#define EPN(e) ((e) & 0xfffffc00)
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#define EPN(e) ((e) & 0xfffffc00)
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#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
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#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
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#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
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#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
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-#define TLB2(a) ( (a)&0x00000fbf )
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+#define TLB2(a) ( (a)&0x00000fbf )
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#define tlbtab_start\
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#define tlbtab_start\
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mflr r1 ;\
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mflr r1 ;\
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@@ -86,12 +88,14 @@
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tlbtab:
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tlbtab:
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tlbtab_start
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tlbtab_start
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- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
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- tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I)
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+ tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
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+ tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I )
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tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
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tlbentry( CFG_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X )
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tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
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tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X )
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tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
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tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
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- tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
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+ tlbentry( CFG_SDRAM_BASE + 0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
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+ tlbentry( CFG_SDRAM_BASE + 0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
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+ tlbentry( CFG_SDRAM_BASE + 0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
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tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
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tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I )
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tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
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tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I )
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tlbtab_end
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tlbtab_end
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