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@@ -41,8 +41,6 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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int board_early_init_f(void)
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{
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{
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- u32 pvr = get_pvr();
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-
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/*
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/*
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* Setup the interrupt controller polarities, triggers, etc.
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* Setup the interrupt controller polarities, triggers, etc.
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*/
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*/
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@@ -95,16 +93,14 @@ int board_early_init_f(void)
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mtdcr(AHB_TOP, 0x8000004B);
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mtdcr(AHB_TOP, 0x8000004B);
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mtdcr(AHB_BOT, 0x8000004B);
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mtdcr(AHB_BOT, 0x8000004B);
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- if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) {
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- /*
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- * Configure USB-STP pins as alternate and not GPIO
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- * It seems to be neccessary to configure the STP pins as GPIO
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- * input at powerup (perhaps while USB reset is asserted). So
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- * we configure those pins to their "real" function now.
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- */
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- gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
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- gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
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- }
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+ /*
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+ * Configure USB-STP pins as alternate and not GPIO
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+ * It seems to be neccessary to configure the STP pins as GPIO
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+ * input at powerup (perhaps while USB reset is asserted). So
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+ * we configure those pins to their "real" function now.
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+ */
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+ gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
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+ gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
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/* Trigger board component reset */
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/* Trigger board component reset */
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out_le16((void *)CONFIG_SYS_IO_BASE, 0xffff);
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out_le16((void *)CONFIG_SYS_IO_BASE, 0xffff);
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@@ -250,7 +246,6 @@ int misc_init_r(void)
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{
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{
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u32 sdr0_srst1 = 0;
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u32 sdr0_srst1 = 0;
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u32 eth_cfg;
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u32 eth_cfg;
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- u32 pvr = get_pvr();
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/*
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/*
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* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
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* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
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@@ -264,10 +259,7 @@ int misc_init_r(void)
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/* Set the for 2 RGMII mode */
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/* Set the for 2 RGMII mode */
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/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
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/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
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eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
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eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
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- if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA))
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- eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
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- else
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- eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
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+ eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
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mtsdr(SDR0_ETH_CFG, eth_cfg);
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mtsdr(SDR0_ETH_CFG, eth_cfg);
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/*
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/*
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