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@@ -0,0 +1,1018 @@
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+/*
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+ * (C) Copyright 2002
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+ * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
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+ *
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+ * Copyright (C) 2003 Arabella Software Ltd.
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+ * Yuli Barcohen <yuli@arabellasw.com>
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+ * Modified to work with AMD flashes
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ *
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+ * History
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+ * 01/20/2004 - combined variants of original driver.
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+ *
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+ * Tested Architectures
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+ * Port Width Chip Width # of banks Flash Chip Board
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+ * 32 16 1 23F128J3 seranoa/eagle
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+ *
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+ */
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+
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+/* The DEBUG define must be before common to enable debugging */
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+#undef DEBUG
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+#include <common.h>
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+#include <asm/processor.h>
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+#ifdef CFG_FLASH_CFI_DRIVER
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+/*
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+ * This file implements a Common Flash Interface (CFI) driver for U-Boot.
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+ * The width of the port and the width of the chips are determined at initialization.
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+ * These widths are used to calculate the address for access CFI data structures.
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+ * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
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+ *
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+ * References
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+ * JEDEC Standard JESD68 - Common Flash Interface (CFI)
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+ * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
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+ * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
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+ * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
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+ *
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+ * TODO
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+ *
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+ * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
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+ * Table (ALT) to determine if protection is available
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+ *
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+ * Add support for other command sets Use the PRI and ALT to determine command set
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+ * Verify erase and program timeouts.
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+ */
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+
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+#define FLASH_CMD_CFI 0x98
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+#define FLASH_CMD_READ_ID 0x90
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+#define FLASH_CMD_RESET 0xff
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+#define FLASH_CMD_BLOCK_ERASE 0x20
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+#define FLASH_CMD_ERASE_CONFIRM 0xD0
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+#define FLASH_CMD_WRITE 0x40
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+#define FLASH_CMD_PROTECT 0x60
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+#define FLASH_CMD_PROTECT_SET 0x01
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+#define FLASH_CMD_PROTECT_CLEAR 0xD0
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+#define FLASH_CMD_CLEAR_STATUS 0x50
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+#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
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+#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
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+
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+#define FLASH_STATUS_DONE 0x80
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+#define FLASH_STATUS_ESS 0x40
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+#define FLASH_STATUS_ECLBS 0x20
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+#define FLASH_STATUS_PSLBS 0x10
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+#define FLASH_STATUS_VPENS 0x08
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+#define FLASH_STATUS_PSS 0x04
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+#define FLASH_STATUS_DPS 0x02
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+#define FLASH_STATUS_R 0x01
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+#define FLASH_STATUS_PROTECT 0x01
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+
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+#define AMD_CMD_RESET 0xF0
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+#define AMD_CMD_WRITE 0xA0
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+#define AMD_CMD_ERASE_START 0x80
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+#define AMD_CMD_ERASE_SECTOR 0x30
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+
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+#define AMD_STATUS_TOGGLE 0x40
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+#define AMD_STATUS_ERROR 0x20
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+
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+#define FLASH_OFFSET_CFI 0x55
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+#define FLASH_OFFSET_CFI_RESP 0x10
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+#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
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+#define FLASH_OFFSET_WTOUT 0x1F
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+#define FLASH_OFFSET_WBTOUT 0x20
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+#define FLASH_OFFSET_ETOUT 0x21
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+#define FLASH_OFFSET_CETOUT 0x22
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+#define FLASH_OFFSET_WMAX_TOUT 0x23
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+#define FLASH_OFFSET_WBMAX_TOUT 0x24
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+#define FLASH_OFFSET_EMAX_TOUT 0x25
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+#define FLASH_OFFSET_CEMAX_TOUT 0x26
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+#define FLASH_OFFSET_SIZE 0x27
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+#define FLASH_OFFSET_INTERFACE 0x28
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+#define FLASH_OFFSET_BUFFER_SIZE 0x2A
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+#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
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+#define FLASH_OFFSET_ERASE_REGIONS 0x2D
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+#define FLASH_OFFSET_PROTECT 0x02
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+#define FLASH_OFFSET_USER_PROTECTION 0x85
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+#define FLASH_OFFSET_INTEL_PROTECTION 0x81
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+
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+
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+#define FLASH_MAN_CFI 0x01000000
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+
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+#define CFI_CMDSET_NONE 0
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+#define CFI_CMDSET_INTEL_EXTENDED 1
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+#define CFI_CMDSET_AMD_STANDARD 2
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+#define CFI_CMDSET_INTEL_STANDARD 3
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+#define CFI_CMDSET_AMD_EXTENDED 4
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+#define CFI_CMDSET_MITSU_STANDARD 256
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+#define CFI_CMDSET_MITSU_EXTENDED 257
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+#define CFI_CMDSET_SST 258
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+
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+
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+typedef union {
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+ unsigned char c;
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+ unsigned short w;
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+ unsigned long l;
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+ unsigned long long ll;
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+} cfiword_t;
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+
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+typedef union {
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+ volatile unsigned char *cp;
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+ volatile unsigned short *wp;
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+ volatile unsigned long *lp;
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+ volatile unsigned long long *llp;
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+} cfiptr_t;
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+
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+#define NUM_ERASE_REGIONS 4
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+
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+static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
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+
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+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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+
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+/*-----------------------------------------------------------------------
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+ * Functions
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+ */
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+
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+typedef unsigned long flash_sect_t;
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+
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+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
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+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
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+static void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
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+static void flash_unlock_seq(flash_info_t *info);
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+static int flash_isequal(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
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+static int flash_isset(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
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+static int flash_toggle(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
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+static int flash_detect_cfi(flash_info_t * info);
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+static ulong flash_get_size (ulong base, int banknum);
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+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
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+static int flash_full_status_check(flash_info_t * info, flash_sect_t sector, ulong tout, char * prompt);
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+#ifdef CFG_FLASH_USE_BUFFER_WRITE
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+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
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+#endif
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+
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+#ifdef DEBUG
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+void print_longlong(char * str, unsigned long long data)
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+{
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+ int i;
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+ char *cp;
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+ cp = (unsigned char *)&data;
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+ for(i=0;i<8; i++)
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+ sprintf(&str[i*2], "%2.2x", *cp++);
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+}
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+#endif
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+
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+
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+/*-----------------------------------------------------------------------
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+ * create an address based on the offset and the port width
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+ */
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+inline uchar * flash_make_addr(flash_info_t * info, flash_sect_t sect, uint offset)
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+{
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+ return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
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+}
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+/*-----------------------------------------------------------------------
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+ * read a character at a port width address
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+ */
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+inline uchar flash_read_uchar(flash_info_t * info, uint offset)
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+{
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+ uchar *cp;
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+ cp = flash_make_addr(info, 0, offset);
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+ return (cp[info->portwidth - 1]);
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+}
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+
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+/*-----------------------------------------------------------------------
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+ * read a short word by swapping for ppc format.
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+ */
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+ushort flash_read_ushort(flash_info_t * info, flash_sect_t sect, uint offset)
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+{
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+ uchar * addr;
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+
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+ addr = flash_make_addr(info, sect, offset);
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+ return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
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+
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+}
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+
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+/*-----------------------------------------------------------------------
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+ * read a long word by picking the least significant byte of each maiximum
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+ * port size word. Swap for ppc format.
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+ */
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+ulong flash_read_long(flash_info_t * info, flash_sect_t sect, uint offset)
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+{
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+ uchar * addr;
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+
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+ addr = flash_make_addr(info, sect, offset);
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+ return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
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+ (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
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+
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+}
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+
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+/*-----------------------------------------------------------------------
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+ */
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+unsigned long flash_init (void)
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+{
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+ unsigned long size = 0;
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+ int i;
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+
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+ /* Init: no FLASHes known */
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+ for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
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+ flash_info[i].flash_id = FLASH_UNKNOWN;
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+ size += flash_info[i].size = flash_get_size(bank_base[i], i);
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+ if (flash_info[i].flash_id == FLASH_UNKNOWN) {
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+ printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
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+ i, flash_info[i].size, flash_info[i].size << 20);
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+ }
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+ }
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+
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+ /* Monitor protection ON by default */
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+#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
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+ flash_protect(FLAG_PROTECT_SET,
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+ CFG_MONITOR_BASE,
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+ CFG_MONITOR_BASE + monitor_flash_len - 1,
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+ &flash_info[0]);
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+#endif
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+
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+ return (size);
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+}
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+
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+/*-----------------------------------------------------------------------
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+ */
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+int flash_erase (flash_info_t *info, int s_first, int s_last)
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+{
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+ int rcode = 0;
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+ int prot;
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+ flash_sect_t sect;
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+
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+ if( info->flash_id != FLASH_MAN_CFI) {
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+ printf ("Can't erase unknown flash type - aborted\n");
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+ return 1;
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+ }
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+ if ((s_first < 0) || (s_first > s_last)) {
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+ printf ("- no sectors to erase\n");
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+ return 1;
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+ }
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+
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+ prot = 0;
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+ for (sect=s_first; sect<=s_last; ++sect) {
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+ if (info->protect[sect]) {
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+ prot++;
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+ }
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+ }
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+ if (prot) {
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+ printf ("- Warning: %d protected sectors will not be erased!\n",
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+ prot);
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+ } else {
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+ printf ("\n");
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+ }
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+
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+
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+ for (sect = s_first; sect<=s_last; sect++) {
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+ if (info->protect[sect] == 0) { /* not protected */
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+ switch(info->vendor) {
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+ case CFI_CMDSET_INTEL_STANDARD:
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+ case CFI_CMDSET_INTEL_EXTENDED:
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+ flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
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+ flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
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+ flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
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+ break;
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+ case CFI_CMDSET_AMD_STANDARD:
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+ case CFI_CMDSET_AMD_EXTENDED:
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+ flash_unlock_seq(info);
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+ flash_write_cmd(info, sect, 0x555, AMD_CMD_ERASE_START);
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+ flash_unlock_seq(info);
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+ flash_write_cmd(info, sect, 0, AMD_CMD_ERASE_SECTOR);
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+ break;
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+ default:
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+ debug("Unkown flash vendor %d\n", info->vendor);
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+ break;
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+ }
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+
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+ if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
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+ rcode = 1;
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+ } else
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+ printf(".");
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+ }
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+ }
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+ printf (" done\n");
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+ return rcode;
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+}
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+
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+/*-----------------------------------------------------------------------
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+ */
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+void flash_print_info (flash_info_t *info)
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+{
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+ int i;
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+
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+ if (info->flash_id != FLASH_MAN_CFI) {
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+ printf ("missing or unknown FLASH type\n");
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+ return;
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+ }
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+
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+ printf("CFI conformant FLASH (%d x %d)",
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+ (info->portwidth << 3 ), (info->chipwidth << 3 ));
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+ printf (" Size: %ld MB in %d Sectors\n",
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+ info->size >> 20, info->sector_count);
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+ printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
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+ info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
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+
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+ printf (" Sector Start Addresses:");
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+ for (i=0; i<info->sector_count; ++i) {
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+#ifdef CFG_FLASH_EMPTY_INFO
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+ int k;
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+ int size;
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+ int erased;
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+ volatile unsigned long *flash;
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+
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+ /*
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+ * Check if whole sector is erased
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+ */
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+ if (i != (info->sector_count-1))
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+ size = info->start[i+1] - info->start[i];
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+ else
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+ size = info->start[0] + info->size - info->start[i];
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+ erased = 1;
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+ flash = (volatile unsigned long *)info->start[i];
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+ size = size >> 2; /* divide by 4 for longword access */
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+ for (k=0; k<size; k++)
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+ {
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+ if (*flash++ != 0xffffffff)
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+ {
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+ erased = 0;
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+ break;
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+ }
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+ }
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+
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+ if ((i % 5) == 0)
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+ printf ("\n");
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+ /* print empty and read-only info */
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+ printf (" %08lX%s%s",
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+ info->start[i],
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+ erased ? " E" : " ",
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+ info->protect[i] ? "RO " : " ");
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+#else
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+ if ((i % 5) == 0)
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+ printf ("\n ");
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+ printf (" %08lX%s",
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+ info->start[i],
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+ info->protect[i] ? " (RO)" : " ");
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+#endif
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+ }
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+ printf ("\n");
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+ return;
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+}
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+
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+/*-----------------------------------------------------------------------
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+ * Copy memory to flash, returns:
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+ * 0 - OK
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+ * 1 - write timeout
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+ * 2 - Flash not erased
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+ */
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+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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+{
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+ ulong wp;
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+ ulong cp;
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+ int aln;
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+ cfiword_t cword;
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+ int i, rc;
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+
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+ /* get lower aligned address */
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+ wp = (addr & ~(info->portwidth - 1));
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+
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+ /* handle unaligned start */
|
|
|
+ if((aln = addr - wp) != 0) {
|
|
|
+ cword.l = 0;
|
|
|
+ cp = wp;
|
|
|
+ for(i=0;i<aln; ++i, ++cp)
|
|
|
+ flash_add_byte(info, &cword, (*(uchar *)cp));
|
|
|
+
|
|
|
+ for(; (i< info->portwidth) && (cnt > 0) ; i++) {
|
|
|
+ flash_add_byte(info, &cword, *src++);
|
|
|
+ cnt--;
|
|
|
+ cp++;
|
|
|
+ }
|
|
|
+ for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
|
|
|
+ flash_add_byte(info, &cword, (*(uchar *)cp));
|
|
|
+ if((rc = flash_write_cfiword(info, wp, cword)) != 0)
|
|
|
+ return rc;
|
|
|
+ wp = cp;
|
|
|
+ }
|
|
|
+
|
|
|
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
|
|
|
+ while(cnt >= info->portwidth) {
|
|
|
+ i = info->buffer_size > cnt? cnt: info->buffer_size;
|
|
|
+ if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
|
|
|
+ return rc;
|
|
|
+ wp += i;
|
|
|
+ src += i;
|
|
|
+ cnt -=i;
|
|
|
+ }
|
|
|
+#else
|
|
|
+ /* handle the aligned part */
|
|
|
+ while(cnt >= info->portwidth) {
|
|
|
+ cword.l = 0;
|
|
|
+ for(i = 0; i < info->portwidth; i++) {
|
|
|
+ flash_add_byte(info, &cword, *src++);
|
|
|
+ }
|
|
|
+ if((rc = flash_write_cfiword(info, wp, cword)) != 0)
|
|
|
+ return rc;
|
|
|
+ wp += info->portwidth;
|
|
|
+ cnt -= info->portwidth;
|
|
|
+ }
|
|
|
+#endif /* CFG_FLASH_USE_BUFFER_WRITE */
|
|
|
+ if (cnt == 0) {
|
|
|
+ return (0);
|
|
|
+ }
|
|
|
+
|
|
|
+ /*
|
|
|
+ * handle unaligned tail bytes
|
|
|
+ */
|
|
|
+ cword.l = 0;
|
|
|
+ for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
|
|
|
+ flash_add_byte(info, &cword, *src++);
|
|
|
+ --cnt;
|
|
|
+ }
|
|
|
+ for (; i<info->portwidth; ++i, ++cp) {
|
|
|
+ flash_add_byte(info, & cword, (*(uchar *)cp));
|
|
|
+ }
|
|
|
+
|
|
|
+ return flash_write_cfiword(info, wp, cword);
|
|
|
+}
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ */
|
|
|
+#ifdef CFG_FLASH_PROTECTION
|
|
|
+
|
|
|
+int flash_real_protect(flash_info_t *info, long sector, int prot)
|
|
|
+{
|
|
|
+ int retcode = 0;
|
|
|
+
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
|
|
|
+ if(prot)
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
|
|
|
+ else
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
|
|
|
+
|
|
|
+ if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
|
|
|
+ prot?"protect":"unprotect")) == 0) {
|
|
|
+
|
|
|
+ info->protect[sector] = prot;
|
|
|
+ /* Intel's unprotect unprotects all locking */
|
|
|
+ if(prot == 0) {
|
|
|
+ flash_sect_t i;
|
|
|
+ for(i = 0 ; i<info->sector_count; i++) {
|
|
|
+ if(info->protect[i])
|
|
|
+ flash_real_protect(info, i, 1);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ return retcode;
|
|
|
+ }
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * flash_read_user_serial - read the OneTimeProgramming cells
|
|
|
+ */
|
|
|
+void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len)
|
|
|
+{
|
|
|
+ uchar * src;
|
|
|
+ uchar * dst;
|
|
|
+
|
|
|
+ dst = buffer;
|
|
|
+ src = flash_make_addr(info, 0, FLASH_OFFSET_USER_PROTECTION);
|
|
|
+ flash_write_cmd(info,0, 0, FLASH_CMD_READ_ID);
|
|
|
+ memcpy(dst,src + offset,len);
|
|
|
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
|
|
|
+}
|
|
|
+/*
|
|
|
+ * flash_read_factory_serial - read the device Id from the protection area
|
|
|
+ */
|
|
|
+void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len)
|
|
|
+{
|
|
|
+ uchar * src;
|
|
|
+
|
|
|
+ src = flash_make_addr(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
|
|
|
+ flash_write_cmd(info,0, 0, FLASH_CMD_READ_ID);
|
|
|
+ memcpy(buffer,src + offset,len);
|
|
|
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
|
|
|
+}
|
|
|
+
|
|
|
+#endif /* CFG_FLASH_PROTECTION */
|
|
|
+
|
|
|
+static int flash_poll_status(flash_info_t * info, flash_sect_t sect)
|
|
|
+{
|
|
|
+ int retval;
|
|
|
+ switch(info->vendor) {
|
|
|
+ case CFI_CMDSET_INTEL_STANDARD:
|
|
|
+ case CFI_CMDSET_INTEL_EXTENDED:
|
|
|
+ retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
|
|
|
+ break;
|
|
|
+ case CFI_CMDSET_AMD_STANDARD:
|
|
|
+ case CFI_CMDSET_AMD_EXTENDED:
|
|
|
+ retval = flash_toggle(info, sect, 0, AMD_STATUS_TOGGLE);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ retval = 0;
|
|
|
+ }
|
|
|
+ return retval;
|
|
|
+}
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * wait for XSR.7 to be set. Time out with an error if it does not.
|
|
|
+ * This routine does not set the flash to read-array mode.
|
|
|
+ */
|
|
|
+static int flash_status_check(flash_info_t * info, flash_sect_t sector, ulong tout, char * prompt)
|
|
|
+{
|
|
|
+ ulong start;
|
|
|
+
|
|
|
+ /* Wait for command completion */
|
|
|
+ start = get_timer (0);
|
|
|
+ while (flash_poll_status(info, sector)) {
|
|
|
+ if (get_timer(start) > info->erase_blk_tout) {
|
|
|
+ printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
|
|
|
+ flash_write_cmd(info, sector, 0, info->cmd_reset);
|
|
|
+ return ERR_TIMOUT;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ return ERR_OK;
|
|
|
+}
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
|
|
|
+ * This routine sets the flash to read-array mode.
|
|
|
+ */
|
|
|
+static int flash_full_status_check(flash_info_t * info, flash_sect_t sector, ulong tout, char * prompt)
|
|
|
+{
|
|
|
+ int retcode;
|
|
|
+ retcode = flash_status_check(info, sector, tout, prompt);
|
|
|
+ switch(info->vendor) {
|
|
|
+ case CFI_CMDSET_INTEL_EXTENDED:
|
|
|
+ case CFI_CMDSET_INTEL_STANDARD:
|
|
|
+ if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
|
|
|
+ retcode = ERR_INVAL;
|
|
|
+ printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
|
|
|
+ if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
|
|
|
+ printf("Command Sequence Error.\n");
|
|
|
+ } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
|
|
|
+ printf("Block Erase Error.\n");
|
|
|
+ retcode = ERR_NOT_ERASED;
|
|
|
+ } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
|
|
|
+ printf("Locking Error\n");
|
|
|
+ }
|
|
|
+ if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
|
|
|
+ printf("Block locked.\n");
|
|
|
+ retcode = ERR_PROTECTED;
|
|
|
+ }
|
|
|
+ if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
|
|
|
+ printf("Vpp Low Error.\n");
|
|
|
+ }
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ return retcode;
|
|
|
+}
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ */
|
|
|
+static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
|
|
|
+{
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ cword->c = c;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ cword->w = (cword->w << 8) | c;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ cword->l = (cword->l << 8) | c;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ cword->ll = (cword->ll << 8) | c;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * make a proper sized command based on the port and chip widths
|
|
|
+ */
|
|
|
+static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
|
|
|
+{
|
|
|
+ int i;
|
|
|
+ uchar *cp = (uchar *)cmdbuf;
|
|
|
+ for(i=0; i< info->portwidth; i++)
|
|
|
+ *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Write a proper sized command to the correct address
|
|
|
+ */
|
|
|
+static void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
|
|
|
+{
|
|
|
+
|
|
|
+ volatile cfiptr_t addr;
|
|
|
+ cfiword_t cword;
|
|
|
+ addr.cp = flash_make_addr(info, sect, offset);
|
|
|
+ flash_make_cmd(info, cmd, &cword);
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ debug("fwc addr %p cmd %x %x 8bit x %d bit\n",addr.cp, cmd, cword.c,
|
|
|
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
|
|
|
+ *addr.cp = cword.c;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",addr.wp, cmd, cword.w,
|
|
|
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
|
|
|
+ *addr.wp = cword.w;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ debug("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",addr.lp, cmd, cword.l,
|
|
|
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
|
|
|
+ *addr.lp = cword.l;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+#ifdef DEBUG
|
|
|
+ {
|
|
|
+ char str[20];
|
|
|
+ print_longlong(str, cword.ll);
|
|
|
+
|
|
|
+ printf("fwc addr %p cmd %x %s 64 bit x %d bit\n",addr.llp, cmd, str,
|
|
|
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
|
|
|
+ }
|
|
|
+#endif
|
|
|
+ *addr.llp = cword.ll;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+static void flash_unlock_seq(flash_info_t *info)
|
|
|
+{
|
|
|
+ flash_write_cmd(info, 0, 0x555, 0xAA);
|
|
|
+ flash_write_cmd(info, 0, 0x2AA, 0x55);
|
|
|
+}
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ */
|
|
|
+static int flash_isequal(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
|
|
|
+{
|
|
|
+ cfiptr_t cptr;
|
|
|
+ cfiword_t cword;
|
|
|
+ int retval;
|
|
|
+ cptr.cp = flash_make_addr(info, sect, offset);
|
|
|
+ flash_make_cmd(info, cmd, &cword);
|
|
|
+
|
|
|
+ debug("is= cmd %x(%c) addr %p ", cmd,cmd, cptr.cp);
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ debug("is= %x %x\n", cptr.cp[0], cword.c);
|
|
|
+ retval = (cptr.cp[0] == cword.c);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ debug("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
|
|
|
+ retval = (cptr.wp[0] == cword.w);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ debug("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
|
|
|
+ retval = (cptr.lp[0] == cword.l);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+#ifdef DEBUG
|
|
|
+ {
|
|
|
+ char str1[20];
|
|
|
+ char str2[20];
|
|
|
+ print_longlong(str1, cptr.llp[0]);
|
|
|
+ print_longlong(str2, cword.ll);
|
|
|
+ printf("is= %s %s\n", str1, str2);
|
|
|
+ }
|
|
|
+#endif
|
|
|
+ retval = (cptr.llp[0] == cword.ll);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ retval = 0;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ return retval;
|
|
|
+}
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ */
|
|
|
+static int flash_isset(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
|
|
|
+{
|
|
|
+ cfiptr_t cptr;
|
|
|
+ cfiword_t cword;
|
|
|
+ int retval;
|
|
|
+ cptr.cp = flash_make_addr(info, sect, offset);
|
|
|
+ flash_make_cmd(info, cmd, &cword);
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ retval = ((cptr.cp[0] & cword.c) == cword.c);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ retval = ((cptr.wp[0] & cword.w) == cword.w);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ retval = ((cptr.lp[0] & cword.l) == cword.l);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ retval = ((cptr.llp[0] & cword.ll) == cword.ll);
|
|
|
+ default:
|
|
|
+ retval = 0;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ return retval;
|
|
|
+}
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ */
|
|
|
+static int flash_toggle(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
|
|
|
+{
|
|
|
+ cfiptr_t cptr;
|
|
|
+ cfiword_t cword;
|
|
|
+ int retval;
|
|
|
+ cptr.cp = flash_make_addr(info, sect, offset);
|
|
|
+ flash_make_cmd(info, cmd, &cword);
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ retval = ((cptr.llp[0] & cword.ll) != (cptr.llp[0] & cword.ll));
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ retval = 0;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ return retval;
|
|
|
+}
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * detect if flash is compatible with the Common Flash Interface (CFI)
|
|
|
+ * http://www.jedec.org/download/search/jesd68.pdf
|
|
|
+ *
|
|
|
+*/
|
|
|
+static int flash_detect_cfi(flash_info_t * info)
|
|
|
+{
|
|
|
+
|
|
|
+ puts("flash detect cfi\n");
|
|
|
+
|
|
|
+ for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_64BIT;
|
|
|
+ info->portwidth <<= 1) {
|
|
|
+ /* for(info->chipwidth = info->portwidth;
|
|
|
+ info->chipwidth > 0;
|
|
|
+ info->chipwidth >>= 1) { */
|
|
|
+ for(info->chipwidth =FLASH_CFI_BY8;
|
|
|
+ info->chipwidth <= info->portwidth;
|
|
|
+ info->chipwidth <<= 1) {
|
|
|
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
|
|
|
+ flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
|
|
|
+ if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
|
|
|
+ flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
|
|
|
+ flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
|
|
|
+ debug("found port %d chip %d ", info->portwidth, info->chipwidth);
|
|
|
+ debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH,
|
|
|
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ puts("not found\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+/*
|
|
|
+ * The following code cannot be run from FLASH!
|
|
|
+ *
|
|
|
+ */
|
|
|
+static ulong flash_get_size (ulong base, int banknum)
|
|
|
+{
|
|
|
+ flash_info_t * info = &flash_info[banknum];
|
|
|
+ int i, j;
|
|
|
+ flash_sect_t sect_cnt;
|
|
|
+ unsigned long sector;
|
|
|
+ unsigned long tmp;
|
|
|
+ int size_ratio;
|
|
|
+ uchar num_erase_regions;
|
|
|
+ int erase_region_size;
|
|
|
+ int erase_region_count;
|
|
|
+
|
|
|
+ info->start[0] = base;
|
|
|
+
|
|
|
+ if(flash_detect_cfi(info)){
|
|
|
+ info->vendor = flash_read_ushort(info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
|
|
|
+ switch(info->vendor) {
|
|
|
+ case CFI_CMDSET_INTEL_STANDARD:
|
|
|
+ case CFI_CMDSET_INTEL_EXTENDED:
|
|
|
+ default:
|
|
|
+ info->cmd_reset = FLASH_CMD_RESET;
|
|
|
+ break;
|
|
|
+ case CFI_CMDSET_AMD_STANDARD:
|
|
|
+ case CFI_CMDSET_AMD_EXTENDED:
|
|
|
+ info->cmd_reset = AMD_CMD_RESET;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ debug("manufacturer is %d\n", info->vendor);
|
|
|
+ size_ratio = info->portwidth / info->chipwidth;
|
|
|
+ num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
|
|
|
+ debug("size_ration %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
|
|
|
+ info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
|
|
|
+ debug("found %d erase regions\n", num_erase_regions);
|
|
|
+ sect_cnt = 0;
|
|
|
+ sector = base;
|
|
|
+ for(i = 0 ; i < num_erase_regions; i++) {
|
|
|
+ if(i > NUM_ERASE_REGIONS) {
|
|
|
+ printf("%d erase regions found, only %d used\n",
|
|
|
+ num_erase_regions, NUM_ERASE_REGIONS);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS + i*4);
|
|
|
+ erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
|
|
|
+ tmp >>= 16;
|
|
|
+ erase_region_count = (tmp & 0xffff) +1;
|
|
|
+ for(j = 0; j< erase_region_count; j++) {
|
|
|
+ info->start[sect_cnt] = sector;
|
|
|
+ sector += (erase_region_size * size_ratio);
|
|
|
+ info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
|
|
|
+ sect_cnt++;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ info->sector_count = sect_cnt;
|
|
|
+ /* multiply the size by the number of chips */
|
|
|
+ info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
|
|
|
+ info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
|
|
|
+ tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
|
|
|
+ info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
|
|
|
+ tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
|
|
|
+ info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
|
|
|
+ tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
|
|
|
+ info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
|
|
|
+ info->flash_id = FLASH_MAN_CFI;
|
|
|
+ }
|
|
|
+
|
|
|
+ flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
|
|
|
+ return(info->size);
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ */
|
|
|
+static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
|
|
|
+{
|
|
|
+
|
|
|
+ cfiptr_t ctladdr;
|
|
|
+ cfiptr_t cptr;
|
|
|
+ int flag;
|
|
|
+
|
|
|
+ ctladdr.cp = flash_make_addr(info, 0, 0);
|
|
|
+ cptr.cp = (uchar *)dest;
|
|
|
+
|
|
|
+
|
|
|
+ /* Check if Flash is (sufficiently) erased */
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ flag = ((cptr.cp[0] & cword.c) == cword.c);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ flag = ((cptr.wp[0] & cword.w) == cword.w);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ flag = ((cptr.lp[0] & cword.l) == cword.l);
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ flag = ((cptr.lp[0] & cword.ll) == cword.ll);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ return 2;
|
|
|
+ }
|
|
|
+ if(!flag)
|
|
|
+ return 2;
|
|
|
+
|
|
|
+ /* Disable interrupts which might cause a timeout here */
|
|
|
+ flag = disable_interrupts();
|
|
|
+
|
|
|
+ switch(info->vendor) {
|
|
|
+ case CFI_CMDSET_INTEL_EXTENDED:
|
|
|
+ case CFI_CMDSET_INTEL_STANDARD:
|
|
|
+ flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
|
|
|
+ flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
|
|
|
+ break;
|
|
|
+ case CFI_CMDSET_AMD_EXTENDED:
|
|
|
+ case CFI_CMDSET_AMD_STANDARD:
|
|
|
+ flash_unlock_seq(info);
|
|
|
+ flash_write_cmd(info, 0, 0x555, AMD_CMD_WRITE);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ cptr.cp[0] = cword.c;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ cptr.wp[0] = cword.w;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ cptr.lp[0] = cword.l;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ cptr.llp[0] = cword.ll;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* re-enable interrupts if necessary */
|
|
|
+ if(flag)
|
|
|
+ enable_interrupts();
|
|
|
+
|
|
|
+ return flash_full_status_check(info, 0, info->write_tout, "write");
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
|
|
|
+
|
|
|
+/* loop through the sectors from the highest address
|
|
|
+ * when the passed address is greater or equal to the sector address
|
|
|
+ * we have a match
|
|
|
+ */
|
|
|
+static flash_sect_t find_sector(flash_info_t *info, ulong addr)
|
|
|
+{
|
|
|
+ flash_sect_t sector;
|
|
|
+ for(sector = info->sector_count - 1; sector >= 0; sector--) {
|
|
|
+ if(addr >= info->start[sector])
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ return sector;
|
|
|
+}
|
|
|
+
|
|
|
+static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
|
|
|
+{
|
|
|
+ flash_sect_t sector;
|
|
|
+ int cnt;
|
|
|
+ int retcode;
|
|
|
+ volatile cfiptr_t src;
|
|
|
+ volatile cfiptr_t dst;
|
|
|
+
|
|
|
+ src.cp = cp;
|
|
|
+ dst.cp = (uchar *)dest;
|
|
|
+ sector = find_sector(info, dest);
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
|
|
|
+ if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
|
|
|
+ "write to buffer")) == ERR_OK) {
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ cnt = len;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ cnt = len >> 1;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ cnt = len >> 2;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ cnt = len >> 3;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ return ERR_INVAL;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ flash_write_cmd(info, sector, 0, (uchar)cnt-1);
|
|
|
+ while(cnt-- > 0) {
|
|
|
+ switch(info->portwidth) {
|
|
|
+ case FLASH_CFI_8BIT:
|
|
|
+ *dst.cp++ = *src.cp++;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ *dst.wp++ = *src.wp++;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ *dst.lp++ = *src.lp++;
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_64BIT:
|
|
|
+ *dst.llp++ = *src.llp++;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ return ERR_INVAL;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
|
|
|
+ retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
|
|
|
+ "buffer write");
|
|
|
+ }
|
|
|
+ flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
|
|
|
+ return retcode;
|
|
|
+}
|
|
|
+#endif /* CFG_USE_FLASH_BUFFER_WRITE */
|
|
|
+#endif /* CFG_FLASH_CFI */
|
wdenk