Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)

Minor edits to clock, apbdma and SPI, make I2C match kernel DT, and add gpio

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

arch/arm/dts/tegra30.dtsi

@@ -3,8 +3,8 @@
 / {
 	compatible = "nvidia,tegra30";
 
-	tegra_car: clock@60006000 {
-		compatible = "nvidia,tegra30-car", "nvidia,tegra20-car";
+	tegra_car: clock {
+		compatible = "nvidia,tegra30-car";
 		reg = <0x60006000 0x1000>;
 		#clock-cells = <1>;
 	};
@@ -44,51 +44,79 @@
 			      0 141 0x04
 			      0 142 0x04
 			      0 143 0x04>;
+		clocks = <&tegra_car 34>;
+	};
+
+	gpio: gpio {
+		compatible = "nvidia,tegra30-gpio";
+		reg = <0x6000d000 0x1000>;
+		interrupts = <0 32 0x04
+			      0 33 0x04
+			      0 34 0x04
+			      0 35 0x04
+			      0 55 0x04
+			      0 87 0x04
+			      0 89 0x04
+			      0 125 0x04>;
+		#gpio-cells = <2>;
+		gpio-controller;
+		#interrupt-cells = <2>;
+		interrupt-controller;
 	};
 
 	i2c@7000c000 {
+		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000c000 0x100>;
+		interrupts = <0 38 0x04>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C000 0x100>;
-		/* PERIPH_ID_I2C1, CLK_M */
-		clocks = <&tegra_car 12>;
+		clocks = <&tegra_car 12>, <&tegra_car 182>;
+		clock-names = "div-clk", "fast-clk";
+		status = "disabled";
 	};
 
 	i2c@7000c400 {
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000c400 0x100>;
+		interrupts = <0 84 0x04>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C400 0x100>;
-		/* PERIPH_ID_I2C2, CLK_M */
-		clocks = <&tegra_car 54>;
+		clocks = <&tegra_car 54>, <&tegra_car 182>;
+		clock-names = "div-clk", "fast-clk";
+		status = "disabled";
 	};
 
 	i2c@7000c500 {
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000c500 0x100>;
+		interrupts = <0 92 0x04>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C500 0x100>;
-		/* PERIPH_ID_I2C3, CLK_M */
-		clocks = <&tegra_car 67>;
+		clocks = <&tegra_car 67>, <&tegra_car 182>;
+		clock-names = "div-clk", "fast-clk";
+		status = "disabled";
 	};
 
 	i2c@7000c700 {
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000c700 0x100>;
+		interrupts = <0 120 0x04>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C700 0x100>;
-		/* PERIPH_ID_I2C4, CLK_M */
-		clocks = <&tegra_car 103>;
+		clocks = <&tegra_car 103>, <&tegra_car 182>;
+		clock-names = "div-clk", "fast-clk";
+		status = "disabled";
 	};
 
 	i2c@7000d000 {
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000d000 0x100>;
+		interrupts = <0 53 0x04>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000D000 0x100>;
-		/* PERIPH_ID_I2C_DVC, CLK_M */
-		clocks = <&tegra_car 47>;
+		clocks = <&tegra_car 47>, <&tegra_car 182>;
+		clock-names = "div-clk", "fast-clk";
+		status = "disabled";
 	};
 
 	spi@7000d400 {
@@ -98,9 +126,8 @@
 		nvidia,dma-request-selector = <&apbdma 15>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
-		/* PERIPH_ID_SBC1, PLLP_OUT0 */
 		clocks = <&tegra_car 41>;
+		status = "disabled";
 	};
 
 	spi@7000d600 {
@@ -110,9 +137,8 @@
 		nvidia,dma-request-selector = <&apbdma 16>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
-		/* PERIPH_ID_SBC2, PLLP_OUT0 */
 		clocks = <&tegra_car 44>;
+		status = "disabled";
 	};
 
 	spi@7000d800 {
@@ -122,9 +148,8 @@
 		nvidia,dma-request-selector = <&apbdma 17>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
-		/* PERIPH_ID_SBC3, PLLP_OUT0 */
 		clocks = <&tegra_car 46>;
+		status = "disabled";
 	};
 
 	spi@7000da00 {
@@ -134,9 +159,8 @@
 		nvidia,dma-request-selector = <&apbdma 18>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
-		/* PERIPH_ID_SBC4, PLLP_OUT0 */
 		clocks = <&tegra_car 68>;
+		status = "disabled";
 	};
 
 	spi@7000dc00 {
@@ -146,9 +170,8 @@
 		nvidia,dma-request-selector = <&apbdma 27>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
-		/* PERIPH_ID_SBC5, PLLP_OUT0 */
 		clocks = <&tegra_car 104>;
+		status = "disabled";
 	};
 
 	spi@7000de00 {
@@ -158,8 +181,7 @@
 		nvidia,dma-request-selector = <&apbdma 28>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		status = "disabled";
-		/* PERIPH_ID_SBC6, PLLP_OUT0 */
 		clocks = <&tegra_car 105>;
+		status = "disabled";
 	};
 };

board/nvidia/dts/tegra30-cardhu.dts

@@ -20,22 +20,27 @@
 	};
 
 	i2c@7000c000 {
+		status = "okay";
 		clock-frequency = <100000>;
 	};
 
 	i2c@7000c400 {
+		status = "okay";
 		clock-frequency = <100000>;
 	};
 
 	i2c@7000c500 {
+		status = "okay";
 		clock-frequency = <100000>;
 	};
 
 	i2c@7000c700 {
+		status = "okay";
 		clock-frequency = <100000>;
 	};
 
 	i2c@7000d000 {
+		status = "okay";
 		clock-frequency = <100000>;
 	};