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@@ -41,29 +41,4 @@ typedef struct at91_rstc {
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#define AT91_RSTC_SR_NRSTL 0x00010000
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-#ifdef CONFIG_AT91_LEGACY
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-
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-#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */
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-#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
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-#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
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-#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
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-
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-#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
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-#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
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-#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
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-#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
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-#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
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-#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
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-#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
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-#define AT91_RSTC_RSTTYP_USER (4 << 8)
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-#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */
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-#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */
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-
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-#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */
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-#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
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-#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
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-#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
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-
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-#endif /* CONFIG_AT91_LEGACY */
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-
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#endif
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