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@@ -53,7 +53,7 @@
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#define CFG_BOOT_BASE_ADDR 0xf0000000
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#define CFG_BOOT_BASE_ADDR 0xf0000000
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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-#define CFG_FLASH_BASE 0xfe000000 /* start of FLASH */
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+#define CFG_FLASH_BASE 0xfc000000 /* start of FLASH */
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_NAND_ADDR 0xd0000000 /* NAND Flash */
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#define CFG_NAND_ADDR 0xd0000000 /* NAND Flash */
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#define CFG_OCM_BASE 0xe0010000 /* ocm */
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#define CFG_OCM_BASE 0xe0010000 /* ocm */
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@@ -234,10 +234,10 @@
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
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"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
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"bootm\0" \
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"bootm\0" \
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- "rootpath=/opt/eldk/ppc_4xx\0" \
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+ "rootpath=/opt/eldk/ppc_4xxFP\0" \
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"bootfile=/tftpboot/sequoia/uImage\0" \
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"bootfile=/tftpboot/sequoia/uImage\0" \
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- "kernel_addr=FE000000\0" \
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- "ramdisk_addr=FE180000\0" \
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+ "kernel_addr=FC000000\0" \
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+ "ramdisk_addr=FC180000\0" \
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"load=tftp 100000 /tftpboot/sequoia/u-boot.bin\0" \
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"load=tftp 100000 /tftpboot/sequoia/u-boot.bin\0" \
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"update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;" \
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"update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;" \
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"cp.b 100000 FFFA0000 60000\0" \
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"cp.b 100000 FFFA0000 60000\0" \
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@@ -378,7 +378,7 @@
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#define CFG_NAND_CS 3 /* NAND chip connected to CSx */
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#define CFG_NAND_CS 3 /* NAND chip connected to CSx */
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/* Memory Bank 0 (NOR-FLASH) initialization */
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/* Memory Bank 0 (NOR-FLASH) initialization */
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#define CFG_EBC_PB0AP 0x03017300
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#define CFG_EBC_PB0AP 0x03017300
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-#define CFG_EBC_PB0CR (CFG_FLASH | 0xba000)
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+#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000)
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/* Memory Bank 3 (NAND-FLASH) initialization */
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/* Memory Bank 3 (NAND-FLASH) initialization */
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#define CFG_EBC_PB3AP 0x018003c0
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#define CFG_EBC_PB3AP 0x018003c0
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@@ -387,7 +387,7 @@
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#define CFG_NAND_CS 0 /* NAND chip connected to CSx */
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#define CFG_NAND_CS 0 /* NAND chip connected to CSx */
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/* Memory Bank 3 (NOR-FLASH) initialization */
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/* Memory Bank 3 (NOR-FLASH) initialization */
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#define CFG_EBC_PB3AP 0x03017300
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#define CFG_EBC_PB3AP 0x03017300
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-#define CFG_EBC_PB3CR (CFG_FLASH | 0xba000)
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+#define CFG_EBC_PB3CR (CFG_FLASH | 0xda000)
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/* Memory Bank 0 (NAND-FLASH) initialization */
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/* Memory Bank 0 (NAND-FLASH) initialization */
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#define CFG_EBC_PB0AP 0x018003c0
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#define CFG_EBC_PB0AP 0x018003c0
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