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@@ -42,6 +42,7 @@
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/dma.h>
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+#include <bouncebuf.h>
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struct mxsmmc_priv {
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int id;
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@@ -95,28 +96,33 @@ static int mxsmmc_send_cmd_pio(struct mxsmmc_priv *priv, struct mmc_data *data)
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static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data)
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{
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uint32_t data_count = data->blocksize * data->blocks;
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- uint32_t cache_data_count;
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+ uint32_t cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN);
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int dmach;
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struct mxs_dma_desc *desc = priv->desc;
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+ void *addr, *backup;
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+ uint8_t flags;
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memset(desc, 0, sizeof(struct mxs_dma_desc));
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desc->address = (dma_addr_t)desc;
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- if (data_count % ARCH_DMA_MINALIGN)
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- cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN);
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- else
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- cache_data_count = data_count;
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-
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if (data->flags & MMC_DATA_READ) {
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priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE;
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- priv->desc->cmd.address = (dma_addr_t)data->dest;
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+ addr = data->dest;
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+ flags = GEN_BB_WRITE;
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} else {
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priv->desc->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ;
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- priv->desc->cmd.address = (dma_addr_t)data->src;
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+ addr = (void *)data->src;
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+ flags = GEN_BB_READ;
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+ }
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+
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+ bounce_buffer_start(&addr, data_count, &backup, flags);
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+
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+ priv->desc->cmd.address = (dma_addr_t)addr;
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+ if (data->flags & MMC_DATA_WRITE) {
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/* Flush data to DRAM so DMA can pick them up */
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- flush_dcache_range((uint32_t)priv->desc->cmd.address,
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- (uint32_t)(priv->desc->cmd.address + cache_data_count));
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+ flush_dcache_range((uint32_t)addr,
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+ (uint32_t)(addr) + cache_data_count);
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}
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/* Invalidate the area, so no writeback into the RAM races with DMA */
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@@ -128,15 +134,19 @@ static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data)
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dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id;
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mxs_dma_desc_append(dmach, priv->desc);
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- if (mxs_dma_go(dmach))
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+ if (mxs_dma_go(dmach)) {
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+ bounce_buffer_stop(&addr, data_count, &backup, flags);
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return COMM_ERR;
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+ }
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/* The data arrived into DRAM, invalidate cache over them */
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if (data->flags & MMC_DATA_READ) {
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- invalidate_dcache_range((uint32_t)priv->desc->cmd.address,
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- (uint32_t)(priv->desc->cmd.address + cache_data_count));
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+ invalidate_dcache_range((uint32_t)addr,
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+ (uint32_t)(addr) + cache_data_count);
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}
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+ bounce_buffer_stop(&addr, data_count, &backup, flags);
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+
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return 0;
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}
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