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@@ -1,5 +1,5 @@
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/*
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- * (C) Copyright 2000
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+ * (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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@@ -22,8 +22,6 @@
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*/
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/*
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- * m8xx.c
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- *
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* CPU specific code
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*
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* written or collected and sometimes rewritten by
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@@ -73,17 +71,17 @@ int checkcpu (void)
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get_sys_info(&sys_info);
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#if CONFIG_405GP
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- puts("IBM PowerPC 405GP");
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+ puts ("IBM PowerPC 405GP");
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if (pvr == PVR_405GPR_RB) {
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putc('r');
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}
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- puts(" Rev. ");
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+ puts (" Rev. ");
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#endif
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#if CONFIG_405CR
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- puts("IBM PowerPC 405CR Rev. ");
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+ puts ("IBM PowerPC 405CR Rev. ");
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#endif
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#if CONFIG_405EP
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- puts("IBM PowerPC 405EP Rev. ");
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+ puts ("IBM PowerPC 405EP Rev. ");
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#endif
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switch (pvr) {
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case PVR_405GP_RB:
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@@ -112,79 +110,71 @@ int checkcpu (void)
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putc('B');
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break;
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default:
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- printf("? (PVR=%08x)", pvr);
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+ printf ("? (PVR=%08x)", pvr);
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break;
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}
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- printf(" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock),
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+ printf (" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock),
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sys_info.freqPLB / 1000000,
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sys_info.freqPLB / sys_info.pllOpbDiv / 1000000,
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sys_info.freqPLB / sys_info.pllExtBusDiv / 1000000);
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#if defined(CONFIG_405GP)
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- if (mfdcr(strap) & PSR_PCI_ASYNC_EN)
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- printf(" PCI async ext clock used, ");
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- else
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- printf(" PCI sync clock at %lu MHz, ",
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+ if (mfdcr(strap) & PSR_PCI_ASYNC_EN) {
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+ printf (" PCI async ext clock used, ");
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+ } else {
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+ printf (" PCI sync clock at %lu MHz, ",
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sys_info.freqPLB / sys_info.pllPciDiv / 1000000);
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- if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
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- printf("internal PCI arbiter enabled\n");
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- else
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- printf("external PCI arbiter enabled\n");
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+ }
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+ printf ("%sternal PCI arbiter enabled\n",
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+ (mfdcr(strap) & PSR_PCI_ARBIT_EN) ? "in" : "ex");
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#elif defined(CONFIG_405EP)
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- if (mfdcr(cpc0_boot) & CPC0_BOOT_SEP)
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- printf(" IIC Boot EEPROM enabled\n");
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- else
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- printf(" IIC Boot EEPROM disabled\n");
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- printf(" PCI async ext clock used, ");
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- if (mfdcr(cpc0_pci) & CPC0_PCI_ARBIT_EN)
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- printf("internal PCI arbiter enabled\n");
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- else
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- printf("external PCI arbiter enabled\n");
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+ printf (" IIC Boot EEPROM %sabled\n",
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+ (mfdcr(cpc0_boot) & CPC0_BOOT_SEP) ? "en" : "dis");
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+ printf (" PCI async ext clock used, ");
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+ printf ("%sternal PCI arbiter enabled\n",
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+ (mfdcr(cpc0_pci) & CPC0_PCI_ARBIT_EN) ? "in" : "ex");
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#endif
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#if defined(CONFIG_405EP)
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- printf(" 16 kB I-Cache 16 kB D-Cache");
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+ printf (" 16 kB I-Cache 16 kB D-Cache");
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#else
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- if ((pvr | 0x00000001) == PVR_405GPR_RB) {
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- printf(" 16 kB I-Cache 16 kB D-Cache");
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- } else {
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- printf(" 16 kB I-Cache 8 kB D-Cache");
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- }
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+ printf (" 16 kB I-Cache %d kB D-Cache",
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+ ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8);
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#endif
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#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
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#ifdef CONFIG_IOP480
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- printf("PLX IOP480 (PVR=%08x)", pvr);
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- printf(" at %s MHz:", strmhz(buf, clock));
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- printf(" %u kB I-Cache", 4);
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- printf(" %u kB D-Cache", 2);
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+ printf ("PLX IOP480 (PVR=%08x)", pvr);
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+ printf (" at %s MHz:", strmhz(buf, clock));
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+ printf (" %u kB I-Cache", 4);
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+ printf (" %u kB D-Cache", 2);
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#endif
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#if defined(CONFIG_440)
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- puts("IBM PowerPC 440 Rev. ");
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- switch(pvr)
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- {
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+ puts ("IBM PowerPC 440 Rev. ");
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+ switch(pvr) {
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case PVR_440GP_RB:
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putc('B');
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- /* See errata 1.12: CHIP_4 */
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- if( ( mfdcr(cpc0_sys0) != mfdcr(cpc0_strp0) )
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- ||( mfdcr(cpc0_sys1) != mfdcr(cpc0_strp1) ) ){
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- puts("\n\t CPC0_SYSx DCRs corrupted. Resetting chip ...\n");
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- udelay( 1000 * 1000 ); /* Give time for serial buf to clear */
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- do_chip_reset( mfdcr(cpc0_strp0), mfdcr(cpc0_strp1) );
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- }
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+ /* See errata 1.12: CHIP_4 */
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+ if ((mfdcr(cpc0_sys0) != mfdcr(cpc0_strp0)) ||
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+ (mfdcr(cpc0_sys1) != mfdcr(cpc0_strp1)) ){
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+ puts ( "\n\t CPC0_SYSx DCRs corrupted. "
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+ "Resetting chip ...\n");
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+ udelay( 1000 * 1000 ); /* Give time for serial buf to clear */
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+ do_chip_reset ( mfdcr(cpc0_strp0),
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+ mfdcr(cpc0_strp1) );
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+ }
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break;
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case PVR_440GP_RC:
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putc('C');
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break;
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default:
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- printf("UNKNOWN (PVR=%08x)", pvr);
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+ printf ("UNKNOWN (PVR=%08x)", pvr);
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break;
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}
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#endif
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-
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- printf("\n");
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+ puts ("\n");
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return 0;
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}
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@@ -208,18 +198,18 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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#if defined(CONFIG_440)
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static
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-int do_chip_reset( unsigned long sys0, unsigned long sys1 )
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+int do_chip_reset (unsigned long sys0, unsigned long sys1)
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{
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- /* Changes to cpc0_sys0 and cpc0_sys1 require chip
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- * reset.
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- */
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- mtdcr( cntrl0, mfdcr(cntrl0) | 0x80000000 ); /* Set SWE */
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- mtdcr( cpc0_sys0, sys0 );
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- mtdcr( cpc0_sys1, sys1 );
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- mtdcr( cntrl0, mfdcr(cntrl0) & ~0x80000000 ); /* Clr SWE */
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- mtspr( dbcr0, 0x20000000); /* Reset the chip */
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-
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- return 1;
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+ /* Changes to cpc0_sys0 and cpc0_sys1 require chip
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+ * reset.
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+ */
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+ mtdcr (cntrl0, mfdcr (cntrl0) | 0x80000000); /* Set SWE */
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+ mtdcr (cpc0_sys0, sys0);
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+ mtdcr (cpc0_sys1, sys1);
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+ mtdcr (cntrl0, mfdcr (cntrl0) & ~0x80000000); /* Clr SWE */
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+ mtspr (dbcr0, 0x20000000); /* Reset the chip */
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+
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+ return 1;
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}
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#endif
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wdenk