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@@ -143,22 +143,21 @@
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#define DBCR1_DV1BE 0x0000F000
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#define DBCR1_DV2BE 0x00000F00
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-/* Bits for the DBSR register */
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-#define DBSR_IC 0x80000000
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-#define DBSR_BT 0x40000000
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-#define DBSR_EDE 0x20000000
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-#define DBSR_TIE 0x10000000
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-#define DBSR_UDE 0x08000000
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-#define DBSR_IA1 0x04000000
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-#define DBSR_IA2 0x02000000
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-#define DBSR_DR1 0x01000000
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-#define DBSR_DW1 0x00800000
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-#define DBSR_DR2 0x00400000
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-#define DBSR_DW2 0x00200000
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-#define DBSR_IDE 0x00100000
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-#define DBSR_IA3 0x00080000
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-#define DBSR_IA4 0x00040000
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-#define DBSR_MRR 0x00000300
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+/*
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+ * DBSR bits which have conflicting definitions on true Book E versus PPC40x
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+ */
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+#ifdef CONFIG_BOOKE
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+#define DBSR_IA1 0x00800000 /* Instr Address Compare 1 Event */
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+#define DBSR_IA2 0x00400000 /* Instr Address Compare 2 Event */
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+#define DBSR_IA3 0x00200000 /* Instr Address Compare 3 Event */
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+#define DBSR_IA4 0x00100000 /* Instr Address Compare 4 Event */
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+#endif
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+#ifndef CONFIG_440
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+#define DBSR_IA1 0x04000000 /* Instr Address Compare 1 Event */
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+#define DBSR_IA2 0x02000000 /* Instr Address Compare 2 Event */
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+#define DBSR_IA3 0x00080000 /* Instr Address Compare 3 Event */
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+#define DBSR_IA4 0x00040000 /* Instr Address Compare 4 Event */
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+#endif
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struct spr_info {
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int spr_val;
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