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@@ -155,7 +155,8 @@ int misc_init_r(void)
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gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
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gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
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gd->bd->bi_flashoffset = 0;
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gd->bd->bi_flashoffset = 0;
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-#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
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+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) || \
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+ defined(CONFIG_SYS_RAMBOOT)
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mtdcr(EBC0_CFGADDR, PB3CR);
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mtdcr(EBC0_CFGADDR, PB3CR);
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#else
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#else
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mtdcr(EBC0_CFGADDR, PB0CR);
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mtdcr(EBC0_CFGADDR, PB0CR);
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@@ -163,7 +164,8 @@ int misc_init_r(void)
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pbcr = mfdcr(EBC0_CFGDATA);
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pbcr = mfdcr(EBC0_CFGDATA);
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size_val = ffs(gd->bd->bi_flashsize) - 21;
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size_val = ffs(gd->bd->bi_flashsize) - 21;
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pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
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pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
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-#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
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+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) || \
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+ defined(CONFIG_SYS_RAMBOOT)
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mtdcr(EBC0_CFGADDR, PB3CR);
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mtdcr(EBC0_CFGADDR, PB3CR);
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#else
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#else
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mtdcr(EBC0_CFGADDR, PB0CR);
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mtdcr(EBC0_CFGADDR, PB0CR);
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