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@@ -42,7 +42,8 @@
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struct ahci_probe_ent *probe_ent = NULL;
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hd_driveid_t *ataid[AHCI_MAX_PORTS];
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-#define writel_with_flush(a,b) do{writel(a,b);readl(b);}while(0)
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+#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
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+
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static inline u32 ahci_port_base(u32 base, u32 port)
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{
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@@ -55,21 +56,25 @@ static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
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{
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base = ahci_port_base(base, port_idx);
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- port->cmd_addr = base;
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- port->scr_addr = base + PORT_SCR;
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+ port->cmd_addr = base;
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+ port->scr_addr = base + PORT_SCR;
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}
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#define msleep(a) udelay(a * 1000)
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#define ssleep(a) msleep(a * 1000)
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-static int waiting_for_cmd_completed(volatile u8 *offset, int timeout_msec, u32 sign)
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+
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+static int waiting_for_cmd_completed(volatile u8 *offset,
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+ int timeout_msec,
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+ u32 sign)
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{
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int i;
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u32 status;
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- for(i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
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+
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+ for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
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msleep(1);
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- return (i < timeout_msec)? 0 : -1;
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+ return (i < timeout_msec) ? 0 : -1;
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}
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@@ -80,11 +85,11 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
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u32 tmp, cap_save;
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u16 tmp16;
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int i, j;
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- volatile u8* port_mmio;
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+ volatile u8 *port_mmio;
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unsigned short vendor;
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cap_save = readl(mmio + HOST_CAP);
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- cap_save &= ( (1<<28) | (1<<17) );
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+ cap_save &= ((1 << 28) | (1 << 17));
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cap_save |= (1 << 27);
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/* global controller reset */
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@@ -121,13 +126,12 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
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probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
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debug("cap 0x%x port_map 0x%x n_ports %d\n",
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- probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
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+ probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
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for (i = 0; i < probe_ent->n_ports; i++) {
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- probe_ent->port[i].port_mmio = ahci_port_base((u32)mmio, i);
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- port_mmio = (u8 *)probe_ent->port[i].port_mmio;
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- ahci_setup_port(&probe_ent->port[i],
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- (unsigned long) mmio, i);
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+ probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
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+ port_mmio = (u8 *) probe_ent->port[i].port_mmio;
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+ ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
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/* make sure port is not active */
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tmp = readl(port_mmio + PORT_CMD);
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@@ -169,11 +173,11 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
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/* set irq mask (enables interrupts) */
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writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
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- /*register linkup ports*/
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+ /*register linkup ports */
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tmp = readl(port_mmio + PORT_SCR_STAT);
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- debug("Port %d status: 0x%x\n",i,tmp);
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- if((tmp & 0xf) == 0x03)
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- probe_ent->link_port_map |= (0x01<< i);
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+ debug("Port %d status: 0x%x\n", i, tmp);
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+ if ((tmp & 0xf) == 0x03)
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+ probe_ent->link_port_map |= (0x01 << i);
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}
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tmp = readl(mmio + HOST_CTL);
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@@ -193,7 +197,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
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static void ahci_print_info(struct ahci_probe_ent *probe_ent)
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{
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pci_dev_t pdev = probe_ent->dev;
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- volatile u8* mmio = (volatile u8 *)probe_ent->mmio_base;
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+ volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
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u32 vers, cap, impl, speed;
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const char *speed_s;
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u16 cc;
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@@ -221,50 +225,38 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent)
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else
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scc_s = "unknown";
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- printf( "AHCI %02x%02x.%02x%02x "
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- "%u slots %u ports %s Gbps 0x%x impl %s mode\n"
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- ,
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-
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- (vers >> 24) & 0xff,
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- (vers >> 16) & 0xff,
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- (vers >> 8) & 0xff,
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- vers & 0xff,
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-
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- ((cap >> 8) & 0x1f) + 1,
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- (cap & 0x1f) + 1,
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- speed_s,
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- impl,
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- scc_s);
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+ printf("AHCI %02x%02x.%02x%02x "
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+ "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
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+ (vers >> 24) & 0xff,
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+ (vers >> 16) & 0xff,
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+ (vers >> 8) & 0xff,
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+ vers & 0xff,
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+ ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
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printf("flags: "
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- "%s%s%s%s%s%s"
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- "%s%s%s%s%s%s%s\n"
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- ,
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-
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- cap & (1 << 31) ? "64bit " : "",
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- cap & (1 << 30) ? "ncq " : "",
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- cap & (1 << 28) ? "ilck " : "",
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- cap & (1 << 27) ? "stag " : "",
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- cap & (1 << 26) ? "pm " : "",
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- cap & (1 << 25) ? "led " : "",
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-
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- cap & (1 << 24) ? "clo " : "",
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- cap & (1 << 19) ? "nz " : "",
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- cap & (1 << 18) ? "only " : "",
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- cap & (1 << 17) ? "pmp " : "",
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- cap & (1 << 15) ? "pio " : "",
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- cap & (1 << 14) ? "slum " : "",
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- cap & (1 << 13) ? "part " : ""
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- );
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+ "%s%s%s%s%s%s"
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+ "%s%s%s%s%s%s%s\n",
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+ cap & (1 << 31) ? "64bit " : "",
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+ cap & (1 << 30) ? "ncq " : "",
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+ cap & (1 << 28) ? "ilck " : "",
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+ cap & (1 << 27) ? "stag " : "",
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+ cap & (1 << 26) ? "pm " : "",
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+ cap & (1 << 25) ? "led " : "",
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+ cap & (1 << 24) ? "clo " : "",
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+ cap & (1 << 19) ? "nz " : "",
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+ cap & (1 << 18) ? "only " : "",
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+ cap & (1 << 17) ? "pmp " : "",
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+ cap & (1 << 15) ? "pio " : "",
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+ cap & (1 << 14) ? "slum " : "",
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+ cap & (1 << 13) ? "part " : "");
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}
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-
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-static int ahci_init_one (pci_dev_t pdev)
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+static int ahci_init_one(pci_dev_t pdev)
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{
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u32 iobase, vendor;
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int rc;
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- memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
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+ memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
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probe_ent = malloc(sizeof(probe_ent));
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memset(probe_ent, 0, sizeof(probe_ent));
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@@ -273,20 +265,22 @@ static int ahci_init_one (pci_dev_t pdev)
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pci_read_config_dword(pdev, AHCI_PCI_BAR, &iobase);
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iobase &= ~0xf;
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- probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY
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- | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA
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- | ATA_FLAG_NO_ATAPI;
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- probe_ent->pio_mask = 0x1f;
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- probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6*/
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+ probe_ent->host_flags = ATA_FLAG_SATA
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+ | ATA_FLAG_NO_LEGACY
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+ | ATA_FLAG_MMIO
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+ | ATA_FLAG_PIO_DMA
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+ | ATA_FLAG_NO_ATAPI;
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+ probe_ent->pio_mask = 0x1f;
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+ probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
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- probe_ent->mmio_base = iobase;
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+ probe_ent->mmio_base = iobase;
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/* Take from kernel:
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* JMicron-specific fixup:
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* make sure we're in AHCI mode
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*/
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pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
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- if(vendor == 0x197b)
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+ if (vendor == 0x197b)
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pci_write_config_byte(pdev, 0x41, 0xa1);
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/* initialize adapter */
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@@ -298,34 +292,34 @@ static int ahci_init_one (pci_dev_t pdev)
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return 0;
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-err_out:
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+ err_out:
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return rc;
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}
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#define MAX_DATA_BYTE_COUNT (4*1024*1024)
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+
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static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
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{
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-
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struct ahci_ioports *pp = &(probe_ent->port[port]);
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struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
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u32 sg_count;
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int i;
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sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
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- if(sg_count > AHCI_MAX_SG){
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+ if (sg_count > AHCI_MAX_SG) {
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printf("Error:Too much sg!\n");
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return -1;
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}
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- for(i = 0;i < sg_count; i++)
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- {
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- ahci_sg->addr = cpu_to_le32((u32)buf + i * MAX_DATA_BYTE_COUNT);
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+ for (i = 0; i < sg_count; i++) {
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+ ahci_sg->addr =
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+ cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
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ahci_sg->addr_hi = 0;
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- ahci_sg->flags_size = cpu_to_le32( 0x3fffff &
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- (buf_len < MAX_DATA_BYTE_COUNT
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- ? (buf_len - 1)
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- : (MAX_DATA_BYTE_COUNT - 1)));
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+ ahci_sg->flags_size = cpu_to_le32(0x3fffff &
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+ (buf_len < MAX_DATA_BYTE_COUNT
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+ ? (buf_len - 1)
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+ : (MAX_DATA_BYTE_COUNT - 1)));
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ahci_sg++;
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buf_len -= MAX_DATA_BYTE_COUNT;
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}
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@@ -345,26 +339,25 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
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static void ahci_set_feature(u8 port)
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{
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-
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struct ahci_ioports *pp = &(probe_ent->port[port]);
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- volatile u8* port_mmio = (volatile u8 *)pp->port_mmio;
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- u32 cmd_fis_len = 5; /* five dwords */
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+ volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
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+ u32 cmd_fis_len = 5; /* five dwords */
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u8 fis[20];
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- /*set feature*/
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- memset(fis,0,20);
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+ /*set feature */
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+ memset(fis, 0, 20);
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fis[0] = 0x27;
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fis[1] = 1 << 7;
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fis[2] = ATA_CMD_SETF;
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fis[3] = SETFEATURES_XFER;
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fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
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- memcpy((unsigned char *)pp->cmd_tbl,fis,20);
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+ memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
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ahci_fill_cmd_slot(pp, cmd_fis_len);
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writel(1, port_mmio + PORT_CMD_ISSUE);
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readl(port_mmio + PORT_CMD_ISSUE);
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- if(waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
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+ if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
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printf("set feature error!\n");
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}
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}
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@@ -372,94 +365,94 @@ static void ahci_set_feature(u8 port)
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static int ahci_port_start(u8 port)
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{
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-
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struct ahci_ioports *pp = &(probe_ent->port[port]);
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- volatile u8* port_mmio = (volatile u8 *)pp->port_mmio;
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+ volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
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u32 port_status;
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u32 mem;
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- debug("Enter start port: %d\n",port);
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+ debug("Enter start port: %d\n", port);
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port_status = readl(port_mmio + PORT_SCR_STAT);
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- debug("Port %d status: %x\n",port,port_status);
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- if((port_status & 0xf) != 0x03){
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+ debug("Port %d status: %x\n", port, port_status);
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+ if ((port_status & 0xf) != 0x03) {
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printf("No Link on this port!\n");
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return -1;
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}
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- mem = (u32)malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
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+ mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
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if (!mem) {
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free(pp);
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printf("No mem for table!\n");
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return -ENOMEM;
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}
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- mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
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+ mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
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+ memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
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- memset((u8 *)mem, 0, AHCI_PORT_PRIV_DMA_SZ);
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/*
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* First item in chunk of DMA memory: 32-slot command table,
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* 32 bytes each in size
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*/
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pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
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- debug("cmd_slot = 0x%x\n",pp->cmd_slot);
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-
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+ debug("cmd_slot = 0x%x\n", pp->cmd_slot);
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mem += (AHCI_CMD_SLOT_SZ + 224);
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+
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/*
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* Second item: Received-FIS area
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*/
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pp->rx_fis = mem;
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-
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mem += AHCI_RX_FIS_SZ;
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+
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/*
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* Third item: data area for storing a single command
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* and its scatter-gather table
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*/
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pp->cmd_tbl = mem;
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- debug("cmd_tbl_dma = 0x%x\n",pp->cmd_tbl);
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+ debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
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mem += AHCI_CMD_TBL_HDR;
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pp->cmd_tbl_sg = (struct ahci_sg *)mem;
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- writel_with_flush((u32)pp->cmd_slot, port_mmio + PORT_LST_ADDR);
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+ writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
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writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
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writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
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- PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
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- PORT_CMD_START, port_mmio + PORT_CMD);
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+ PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
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+ PORT_CMD_START, port_mmio + PORT_CMD);
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- debug("Exit start port %d\n",port);
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+ debug("Exit start port %d\n", port);
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return 0;
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}
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-static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf, int buf_len)
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+static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
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+ int buf_len)
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{
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- struct ahci_ioports *pp = &(probe_ent->port[port]);
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- volatile u8* port_mmio = (volatile u8 *)pp->port_mmio;
|
|
|
+ struct ahci_ioports *pp = &(probe_ent->port[port]);
|
|
|
+ volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
|
|
|
u32 opts;
|
|
|
u32 port_status;
|
|
|
int sg_count;
|
|
|
|
|
|
- debug("Enter get_ahci_device_data: for port %d\n",port);
|
|
|
+ debug("Enter get_ahci_device_data: for port %d\n", port);
|
|
|
|
|
|
- if(port > probe_ent->n_ports){
|
|
|
+ if (port > probe_ent->n_ports) {
|
|
|
printf("Invaild port number %d\n", port);
|
|
|
return -1;
|
|
|
}
|
|
|
|
|
|
port_status = readl(port_mmio + PORT_SCR_STAT);
|
|
|
- if((port_status & 0xf) != 0x03){
|
|
|
- debug("No Link on port %d!\n",port);
|
|
|
+ if ((port_status & 0xf) != 0x03) {
|
|
|
+ debug("No Link on port %d!\n", port);
|
|
|
return -1;
|
|
|
}
|
|
|
|
|
|
memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
|
|
|
|
|
|
- sg_count = ahci_fill_sg(port,buf,buf_len);
|
|
|
- opts = (fis_len >> 2) | (sg_count << 16) ;
|
|
|
+ sg_count = ahci_fill_sg(port, buf, buf_len);
|
|
|
+ opts = (fis_len >> 2) | (sg_count << 16);
|
|
|
ahci_fill_cmd_slot(pp, opts);
|
|
|
|
|
|
writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
|
|
@@ -469,7 +462,7 @@ static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf, int buf_
|
|
|
return -1;
|
|
|
}
|
|
|
debug("get_ahci_device_data: %d byte transferred.\n",
|
|
|
- pp->cmd_slot->status);
|
|
|
+ pp->cmd_slot->status);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -478,7 +471,7 @@ static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf, int buf_
|
|
|
static char *ata_id_strcpy(u16 *target, u16 *src, int len)
|
|
|
{
|
|
|
int i;
|
|
|
- for(i = 0; i < len / 2; i++)
|
|
|
+ for (i = 0; i < len / 2; i++)
|
|
|
target[i] = le16_to_cpu(src[i]);
|
|
|
return (char *)target;
|
|
|
}
|
|
@@ -503,6 +496,7 @@ static void dump_ataid(hd_driveid_t *ataid)
|
|
|
debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
|
|
|
}
|
|
|
|
|
|
+
|
|
|
/*
|
|
|
* SCSI INQUIRY command operation.
|
|
|
*/
|
|
@@ -511,7 +505,7 @@ static int ata_scsiop_inquiry(ccb *pccb)
|
|
|
u8 hdr[] = {
|
|
|
0,
|
|
|
0,
|
|
|
- 0x5, /* claim SPC-3 version compatibility */
|
|
|
+ 0x5, /* claim SPC-3 version compatibility */
|
|
|
2,
|
|
|
95 - 4,
|
|
|
};
|
|
@@ -524,33 +518,33 @@ static int ata_scsiop_inquiry(ccb *pccb)
|
|
|
|
|
|
memcpy(pccb->pdata, hdr, sizeof(hdr));
|
|
|
|
|
|
- if(pccb->datalen <= 35)
|
|
|
+ if (pccb->datalen <= 35)
|
|
|
return 0;
|
|
|
|
|
|
memset(fis, 0, 20);
|
|
|
/* Construct the FIS */
|
|
|
- fis[0] = 0x27; /* Host to device FIS. */
|
|
|
- fis[1] = 1 << 7; /* Command FIS. */
|
|
|
- fis[2] = ATA_CMD_IDENT; /* Command byte. */
|
|
|
+ fis[0] = 0x27; /* Host to device FIS. */
|
|
|
+ fis[1] = 1 << 7; /* Command FIS. */
|
|
|
+ fis[2] = ATA_CMD_IDENT; /* Command byte. */
|
|
|
|
|
|
/* Read id from sata */
|
|
|
port = pccb->target;
|
|
|
- if(!(tmpid = malloc(sizeof(hd_driveid_t))))
|
|
|
+ if (!(tmpid = malloc(sizeof(hd_driveid_t))))
|
|
|
return -ENOMEM;
|
|
|
|
|
|
- if(get_ahci_device_data(port, (u8 *)&fis, 20,
|
|
|
- tmpid, sizeof(hd_driveid_t))){
|
|
|
+ if (get_ahci_device_data(port, (u8 *) & fis, 20,
|
|
|
+ tmpid, sizeof(hd_driveid_t))) {
|
|
|
debug("scsi_ahci: SCSI inquiry command failure.\n");
|
|
|
return -EIO;
|
|
|
}
|
|
|
|
|
|
- if(ataid[port])
|
|
|
+ if (ataid[port])
|
|
|
free(ataid[port]);
|
|
|
- ataid[port] = (hd_driveid_t *)tmpid;
|
|
|
+ ataid[port] = (hd_driveid_t *) tmpid;
|
|
|
|
|
|
memcpy(&pccb->pdata[8], "ATA ", 8);
|
|
|
- ata_id_strcpy((u16 *)&pccb->pdata[16], (u16 *)ataid[port]->model, 16);
|
|
|
- ata_id_strcpy((u16 *)&pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
|
|
|
+ ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
|
|
|
+ ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
|
|
|
|
|
|
dump_ataid(ataid[port]);
|
|
|
return 0;
|
|
@@ -560,15 +554,15 @@ static int ata_scsiop_inquiry(ccb *pccb)
|
|
|
/*
|
|
|
* SCSI READ10 command operation.
|
|
|
*/
|
|
|
-static int ata_scsiop_read10(ccb *pccb)
|
|
|
+static int ata_scsiop_read10(ccb * pccb)
|
|
|
{
|
|
|
u64 lba = 0;
|
|
|
u32 len = 0;
|
|
|
u8 fis[20];
|
|
|
|
|
|
- lba = (((u64)pccb->cmd[2]) << 24) | (((u64)pccb->cmd[3]) << 16)
|
|
|
- | (((u64)pccb->cmd[4]) << 8) | ((u64)pccb->cmd[5]);
|
|
|
- len = (((u32)pccb->cmd[7]) << 8) | ((u32)pccb->cmd[8]);
|
|
|
+ lba = (((u64) pccb->cmd[2]) << 24) | (((u64) pccb->cmd[3]) << 16)
|
|
|
+ | (((u64) pccb->cmd[4]) << 8) | ((u64) pccb->cmd[5]);
|
|
|
+ len = (((u32) pccb->cmd[7]) << 8) | ((u32) pccb->cmd[8]);
|
|
|
|
|
|
/* For 10-byte and 16-byte SCSI R/W commands, transfer
|
|
|
* length 0 means transfer 0 block of data.
|
|
@@ -577,15 +571,16 @@ static int ata_scsiop_read10(ccb *pccb)
|
|
|
*
|
|
|
* WARNING: one or two older ATA drives treat 0 as 0...
|
|
|
*/
|
|
|
- if(!len) return 0;
|
|
|
+ if (!len)
|
|
|
+ return 0;
|
|
|
memset(fis, 0, 20);
|
|
|
|
|
|
/* Construct the FIS */
|
|
|
- fis[0] = 0x27; /* Host to device FIS. */
|
|
|
- fis[1] = 1 << 7; /* Command FIS. */
|
|
|
+ fis[0] = 0x27; /* Host to device FIS. */
|
|
|
+ fis[1] = 1 << 7; /* Command FIS. */
|
|
|
fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
|
|
|
|
|
|
- /* LBA address, only support LBA28 in this driver*/
|
|
|
+ /* LBA address, only support LBA28 in this driver */
|
|
|
fis[4] = pccb->cmd[5];
|
|
|
fis[5] = pccb->cmd[4];
|
|
|
fis[6] = pccb->cmd[3];
|
|
@@ -596,8 +591,8 @@ static int ata_scsiop_read10(ccb *pccb)
|
|
|
fis[13] = pccb->cmd[7];
|
|
|
|
|
|
/* Read from ahci */
|
|
|
- if(get_ahci_device_data(pccb->target, (u8*)&fis, 20,
|
|
|
- pccb->pdata, pccb->datalen)){
|
|
|
+ if (get_ahci_device_data(pccb->target, (u8 *) & fis, 20,
|
|
|
+ pccb->pdata, pccb->datalen)) {
|
|
|
debug("scsi_ahci: SCSI READ10 command failure.\n");
|
|
|
return -EIO;
|
|
|
}
|
|
@@ -613,16 +608,16 @@ static int ata_scsiop_read_capacity10(ccb *pccb)
|
|
|
{
|
|
|
u8 buf[8];
|
|
|
|
|
|
- if(!ataid[pccb->target]) {
|
|
|
+ if (!ataid[pccb->target]) {
|
|
|
printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
|
|
|
- "\tNo ATA info!\n"
|
|
|
- "\tPlease run SCSI commmand INQUIRY firstly!\n");
|
|
|
+ "\tNo ATA info!\n"
|
|
|
+ "\tPlease run SCSI commmand INQUIRY firstly!\n");
|
|
|
return -EPERM;
|
|
|
}
|
|
|
|
|
|
memset(buf, 0, 8);
|
|
|
|
|
|
- *(u32 *)buf = le32_to_cpu(ataid[pccb->target]->lba_capacity);
|
|
|
+ *(u32 *) buf = le32_to_cpu(ataid[pccb->target]->lba_capacity);
|
|
|
|
|
|
buf[6] = 512 >> 8;
|
|
|
buf[7] = 512 & 0xff;
|
|
@@ -641,11 +636,12 @@ static int ata_scsiop_test_unit_ready(ccb *pccb)
|
|
|
return (ataid[pccb->target]) ? 0 : -EPERM;
|
|
|
}
|
|
|
|
|
|
+
|
|
|
int scsi_exec(ccb *pccb)
|
|
|
{
|
|
|
int ret;
|
|
|
|
|
|
- switch(pccb->cmd[0]) {
|
|
|
+ switch (pccb->cmd[0]) {
|
|
|
case SCSI_READ10:
|
|
|
ret = ata_scsiop_read10(pccb);
|
|
|
break;
|
|
@@ -663,8 +659,8 @@ int scsi_exec(ccb *pccb)
|
|
|
return FALSE;
|
|
|
}
|
|
|
|
|
|
- if(ret) {
|
|
|
- debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0],ret);
|
|
|
+ if (ret) {
|
|
|
+ debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
|
|
|
return FALSE;
|
|
|
}
|
|
|
return TRUE;
|
|
@@ -681,13 +677,13 @@ void scsi_low_level_init(int busdevfunc)
|
|
|
|
|
|
linkmap = probe_ent->link_port_map;
|
|
|
|
|
|
- for(i = 0; i < CFG_SCSI_MAX_SCSI_ID; i++){
|
|
|
- if( ((linkmap >> i) & 0x01) ){
|
|
|
- if(ahci_port_start((u8)i)){
|
|
|
- printf("Can not start port %d\n",i);
|
|
|
+ for (i = 0; i < CFG_SCSI_MAX_SCSI_ID; i++) {
|
|
|
+ if (((linkmap >> i) & 0x01)) {
|
|
|
+ if (ahci_port_start((u8) i)) {
|
|
|
+ printf("Can not start port %d\n", i);
|
|
|
continue;
|
|
|
}
|
|
|
- ahci_set_feature((u8)i);
|
|
|
+ ahci_set_feature((u8) i);
|
|
|
}
|
|
|
}
|
|
|
}
|
|
@@ -695,12 +691,12 @@ void scsi_low_level_init(int busdevfunc)
|
|
|
|
|
|
void scsi_bus_reset(void)
|
|
|
{
|
|
|
-/*Not implement*/
|
|
|
+ /*Not implement*/
|
|
|
}
|
|
|
|
|
|
|
|
|
-void scsi_print_error(ccb *pccb)
|
|
|
+void scsi_print_error(ccb * pccb)
|
|
|
{
|
|
|
-/*The ahci error info can be read in the ahci driver*/
|
|
|
+ /*The ahci error info can be read in the ahci driver*/
|
|
|
}
|
|
|
#endif
|