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@@ -180,3 +180,41 @@ int board_eth_init(bd_t *bis)
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{
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{
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return pci_eth_init(bis);
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return pci_eth_init(bis);
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}
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}
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+
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+void setup_pcat_compatibility()
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+{
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+ /* disable global interrupt mode */
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+ writeb(0x40, &sc520_mmcr->picicr);
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+
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+ /* set all irqs to edge */
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+ writeb(0x00, &sc520_mmcr->pic_mode[0]);
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+ writeb(0x00, &sc520_mmcr->pic_mode[1]);
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+ writeb(0x00, &sc520_mmcr->pic_mode[2]);
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+
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+ /*
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+ * active low polarity on PIC interrupt pins,
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+ * active high polarity on all other irq pins
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+ */
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+ writew(0x0000,&sc520_mmcr->intpinpol);
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+
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+ /* Set PIT 0 -> IRQ0, RTC -> IRQ8, FP error -> IRQ13 */
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+ writeb(SC520_IRQ0, &sc520_mmcr->pit_int_map[0]);
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+ writeb(SC520_IRQ8, &sc520_mmcr->rtcmap);
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+ writeb(SC520_IRQ13, &sc520_mmcr->ferrmap);
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+
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+ /* Disable all other interrupt sources */
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[0]);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[1]);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_tmr_int_map[2]);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[1]);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pit_int_map[2]);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[0]); /* disable PCI INT A */
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[1]); /* disable PCI INT B */
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[2]); /* disable PCI INT C */
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[3]); /* disable PCI INT D */
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->dmabcintmap); /* disable DMA INT */
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->ssimap);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wdtmap);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->wpvmap);
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+ writeb(SC520_IRQ_DISABLED, &sc520_mmcr->icemap);
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+}
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