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@@ -86,6 +86,15 @@ int misc_init_r (void)
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return (0);
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return (0);
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}
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}
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+/*
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+ * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot
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+ * from there, which means we cannot test the RAM underneath the ROM at this
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+ * point. It will be unmapped later on, when we are executing from the
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+ * relocated in RAM U-Boot. We simply assume that this RAM is usable if the
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+ * RAM on higher addresses works fine.
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+ */
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+#define REMAPPED_FLASH_SZ 0x40000
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+
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int dram_init (void)
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int dram_init (void)
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{
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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@@ -111,15 +120,17 @@ extern void dram_query(void);
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*
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*
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*/
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*/
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sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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- gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
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- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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+ gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
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+ REMAPPED_FLASH_SZ,
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0x01000000 << sdram_shift);
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0x01000000 << sdram_shift);
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}
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}
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#else
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#else
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- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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+ gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
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+ REMAPPED_FLASH_SZ,
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PHYS_SDRAM_1_SIZE);
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PHYS_SDRAM_1_SIZE);
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#endif /* CM_SPD_DETECT */
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#endif /* CM_SPD_DETECT */
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+ /* We only have one bank of RAM, set it to whatever was detected */
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+ gd->bd->bi_dram[0].size = gd->ram_size;
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return 0;
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return 0;
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}
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}
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