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Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

Wolfgang Denk %!s(int64=16) %!d(string=hai) anos
pai
achega
45f93d4e3c
Modificáronse 2 ficheiros con 11 adicións e 7 borrados
  1. 1 1
      cpu/mpc83xx/cpu_init.c
  2. 10 6
      cpu/mpc83xx/spd_sdram.c

+ 1 - 1
cpu/mpc83xx/cpu_init.c

@@ -106,7 +106,7 @@ void cpu_init_f (volatile immap_t * im)
 #ifdef CONFIG_SYS_SCCR_ENCCM
 #ifdef CONFIG_SYS_SCCR_ENCCM
 	/* Encryption clock mode */
 	/* Encryption clock mode */
 	im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) |
 	im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) |
-		       (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT);
+		       (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT);
 #endif
 #endif
 
 
 #ifdef CONFIG_SYS_SCCR_PCICM
 #ifdef CONFIG_SYS_SCCR_PCICM

+ 10 - 6
cpu/mpc83xx/spd_sdram.c

@@ -219,7 +219,8 @@ long int spd_sdram()
 	ddr->cs_config[0] = ( 1 << 31
 	ddr->cs_config[0] = ( 1 << 31
 			    | (odt_rd_cfg << 20)
 			    | (odt_rd_cfg << 20)
 			    | (odt_wr_cfg << 16)
 			    | (odt_wr_cfg << 16)
-			    | (spd.nrow_addr - 12) << 8
+			    | ((spd.nbanks == 8 ? 1 : 0) << 14)
+			    | ((spd.nrow_addr - 12) << 8)
 			    | (spd.ncol_addr - 8) );
 			    | (spd.ncol_addr - 8) );
 	debug("\n");
 	debug("\n");
 	debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds);
 	debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds);
@@ -231,8 +232,9 @@ long int spd_sdram()
 		ddr->cs_config[1] = ( 1<<31
 		ddr->cs_config[1] = ( 1<<31
 				    | (odt_rd_cfg << 20)
 				    | (odt_rd_cfg << 20)
 				    | (odt_wr_cfg << 16)
 				    | (odt_wr_cfg << 16)
-				    | (spd.nrow_addr-12) << 8
-				    | (spd.ncol_addr-8) );
+				    | ((spd.nbanks == 8 ? 1 : 0) << 14)
+				    | ((spd.nrow_addr - 12) << 8)
+				    | (spd.ncol_addr - 8) );
 		debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds);
 		debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds);
 		debug("cs1_config = 0x%08x\n",ddr->cs_config[1]);
 		debug("cs1_config = 0x%08x\n",ddr->cs_config[1]);
 	}
 	}
@@ -242,7 +244,8 @@ long int spd_sdram()
 	ddr->cs_config[2] = ( 1 << 31
 	ddr->cs_config[2] = ( 1 << 31
 			    | (odt_rd_cfg << 20)
 			    | (odt_rd_cfg << 20)
 			    | (odt_wr_cfg << 16)
 			    | (odt_wr_cfg << 16)
-			    | (spd.nrow_addr - 12) << 8
+			    | ((spd.nbanks == 8 ? 1 : 0) << 14)
+			    | ((spd.nrow_addr - 12) << 8)
 			    | (spd.ncol_addr - 8) );
 			    | (spd.ncol_addr - 8) );
 	debug("\n");
 	debug("\n");
 	debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds);
 	debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds);
@@ -254,8 +257,9 @@ long int spd_sdram()
 		ddr->cs_config[3] = ( 1<<31
 		ddr->cs_config[3] = ( 1<<31
 				    | (odt_rd_cfg << 20)
 				    | (odt_rd_cfg << 20)
 				    | (odt_wr_cfg << 16)
 				    | (odt_wr_cfg << 16)
-				    | (spd.nrow_addr-12) << 8
-				    | (spd.ncol_addr-8) );
+				    | ((spd.nbanks == 8 ? 1 : 0) << 14)
+				    | ((spd.nrow_addr - 12) << 8)
+				    | (spd.ncol_addr - 8) );
 		debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds);
 		debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds);
 		debug("cs3_config = 0x%08x\n",ddr->cs_config[3]);
 		debug("cs3_config = 0x%08x\n",ddr->cs_config[3]);
 	}
 	}