ColdFire: Change the SDRAM BRD2WT timing from 3 to 7

The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>

include/configs/M5475EVB.h

@@ -226,7 +226,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000

include/configs/M5485EVB.h

@@ -212,7 +212,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000