Fix build problems for PM856 Board

CHANGELOG

@@ -2,6 +2,8 @@
 Changes for U-Boot 1.1.3:
 ======================================================================
 
+* Fix build problems for PM856 Board
+
 * Fix sign extension bug in 'fpga loadb' command;
   make 'fpga loadb' always print the file header info
   Patch by Andrew Dyer, 11 Jan 2005

board/pm856/u-boot.lds

@@ -1,5 +1,6 @@
 /*
- * (C) Copyright 2002,2003,Motorola,Inc.
+ * (C) Copyright 2005 Wolfgang Denk <wd@denx.de>
+ * (C) Copyright 2002,2003, Motorola,Inc.
  * Xianghua Xiao, X.Xiao@motorola.com.
  *
  * See file CREDITS for list of people who contributed to this
@@ -66,17 +67,11 @@ SECTIONS
   {
     cpu/mpc85xx/start.o	(.text)
     board/pm856/init.o (.text)
-    cpu/mpc85xx/commproc.o (.text)
     cpu/mpc85xx/traps.o (.text)
     cpu/mpc85xx/interrupts.o (.text)
-    cpu/mpc85xx/serial_scc.o (.text)
-    cpu/mpc85xx/ether_fcc.o (.text)
     cpu/mpc85xx/cpu_init.o (.text)
     cpu/mpc85xx/cpu.o (.text)
-    cpu/mpc85xx/tsec.o (.text)
     cpu/mpc85xx/speed.o (.text)
-    cpu/mpc85xx/i2c.o (.text)
-    cpu/mpc85xx/spd_sdram.o (.text)
     common/dlmalloc.o (.text)
     lib_generic/crc32.o (.text)
     lib_ppc/extable.o (.text)

include/configs/PM854.h

@@ -49,7 +49,7 @@
 #define CONFIG_DDR_2T_TIMING		/* Sets the 2T timing bit */
 
 #define CONFIG_DDR_ECC			/* only for ECC DDR module */
-#define CONFIG_MEM_INIT_VALUE		0xDeadBeef
+#define CONFIG_MEM_INIT_VALUE		0xDEADBEEF
 
 
 /*

include/configs/PM856.h

@@ -39,6 +39,7 @@
 #define CONFIG_E500		1	/* BOOKE e500 family */
 #define CONFIG_MPC85xx		1	/* MPC8540/MPC8560 */
 #define CONFIG_MPC8560		1	/* MPC8560 specific */
+#define CONFIG_CPM2		1	/* Has a CPM2 */
 #define CONFIG_PM856		1	/* PM856 board specific */
 
 #define CONFIG_PCI
@@ -48,6 +49,7 @@
 #define CONFIG_DDR_ECC			/* only for ECC DDR module */
 #define CONFIG_DDR_DLL			/* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING		/* Sets the 2T timing bit */
+#define CONFIG_MEM_INIT_VALUE		0xDEADBEEF
 
 
 /*
@@ -253,7 +255,9 @@
 
 #define CONFIG_MII		1	/* MII PHY management */
 #define CONFIG_MPC85XX_TSEC1	1
+#define CONFIG_MPC85XX_TSEC1_NAME	"TSEC0"
 #define CONFIG_MPC85XX_TSEC2	1
+#define CONFIG_MPC85XX_TSEC2_NAME	"TSEC1"
 #undef CONFIG_MPC85XX_FEC
 #define TSEC1_PHY_ADDR		0
 #define TSEC2_PHY_ADDR		1
@@ -262,7 +266,7 @@
 
 #endif  /* CONFIG_TSEC_ENET */
 
-#define CONFIG_ETHPRIME		"ENET0"
+#define CONFIG_ETHPRIME		"TSEC0"
 
 #define CONFIG_ETHER_ON_FCC	/* define if ether on FCC   */
 #undef  CONFIG_ETHER_NONE	/* define if ether on something else */