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@@ -71,7 +71,8 @@ ext_bus_cntlr_init:
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* This is need for the external flash access
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*/
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lis r25,0x0800
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- ori r25,r25,0x0280 /* 0000 1000 0xxx 0000 0000 0010 100x xxxx = 0x03800280
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+ /* 0000 1000 0xxx 0000 0000 0010 100x xxxx = 0x03800280 */
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+ ori r25,r25,0x0280
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/*
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* Second, create a fast timing:
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* 90ns first cycle - 3 clock access
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@@ -79,7 +80,8 @@ ext_bus_cntlr_init:
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* This is used for the internal access
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*/
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lis r26,0x8900
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- ori r26,r26,0x0280 /* 1000 1001 0xxx 0000 0000 0010 100x xxxx
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+ /* 1000 1001 0xxx 0000 0000 0010 100x xxxx */
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+ ori r26,r26,0x0280
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/*
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* We can't change settings on CS# if we currently use them.
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* -> load a few instructions into cache and run this code from cache
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