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@@ -40,7 +40,7 @@
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* All Sequoias & Rainiers select from two possible EEPROMs in Boot
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* All Sequoias & Rainiers select from two possible EEPROMs in Boot
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* Config F. One for 33MHz PCI, one for 66MHz PCI. The following
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* Config F. One for 33MHz PCI, one for 66MHz PCI. The following
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* values are for the 33MHz PCI configuration. Byte 5 (0 base) is
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* values are for the 33MHz PCI configuration. Byte 5 (0 base) is
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- * the only value affected for a 66MHz PCI and simply needs a +0x10.
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+ * the only value affected for a 33MHz PCI and simply needs a | 0x08.
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*/
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*/
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#define NAND_COMPATIBLE 0x01
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#define NAND_COMPATIBLE 0x01
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@@ -57,6 +57,7 @@ static char *config_labels[] = {
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"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
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"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
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"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
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"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
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"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
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"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
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+ "CPU: 667 PLB: 133 OPB: 66 EBC: 66",
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"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
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"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
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NULL
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NULL
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};
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};
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@@ -97,6 +98,11 @@ static u8 boot_configs[][17] = {
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0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40,
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0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40,
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0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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},
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},
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+ {
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+ (NOR_COMPATIBLE),
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+ 0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40,
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+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
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+ },
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{
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{
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(NAND_COMPATIBLE | NOR_COMPATIBLE),
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(NAND_COMPATIBLE | NOR_COMPATIBLE),
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0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
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0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
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