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@@ -38,33 +38,7 @@
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* turn is based on the boot.bin code from ATMEL
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*
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*/
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-
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-/* flash */
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-#define MC_PUIA 0xFFFFFF10
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-#define MC_PUP 0xFFFFFF50
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-#define MC_PUER 0xFFFFFF54
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-#define MC_ASR 0xFFFFFF04
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-#define MC_AASR 0xFFFFFF08
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-#define EBI_CFGR 0xFFFFFF64
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-#define SMC_CSR0 0xFFFFFF70
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-
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-/* clocks */
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-#define PLLAR 0xFFFFFC28
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-#define PLLBR 0xFFFFFC2C
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-#define MCKR 0xFFFFFC30
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-
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-#define AT91C_BASE_CKGR 0xFFFFFC20
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-#define CKGR_MOR 0
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-
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-/* sdram */
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-#define PIOC_ASR 0xFFFFF870
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-#define PIOC_BSR 0xFFFFF874
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-#define PIOC_PDR 0xFFFFF804
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-#define EBI_CSA 0xFFFFFF60
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-#define SDRC_CR 0xFFFFFF98
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-#define SDRC_MR 0xFFFFFF90
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-#define SDRC_TR 0xFFFFFF94
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-
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+#include <asm/arch/AT91RM9200.h>
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_MTEXT_BASE:
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#undef START_FROM_MEM
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@@ -84,7 +58,7 @@ lowlevel_init:
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#else
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ldr r0, =0x0000FF00 /* Disable main oscillator, OSCOUNT = 0xFF */
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#endif
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- str r0, [r1, #CKGR_MOR]
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+ str r0, [r1, #AT91C_CKGR_MOR]
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/* Add loop to compensate Main Oscillator startup time */
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ldr r0, =0x00000010
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LoopOsc:
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@@ -134,44 +108,44 @@ LoopOsc:
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.ltorg
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SMRDATA:
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- .word MC_PUIA
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+ .word AT91C_MC_PUIA
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.word CONFIG_SYS_MC_PUIA_VAL
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- .word MC_PUP
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+ .word AT91C_MC_PUP
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.word CONFIG_SYS_MC_PUP_VAL
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- .word MC_PUER
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+ .word AT91C_MC_PUER
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.word CONFIG_SYS_MC_PUER_VAL
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- .word MC_ASR
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+ .word AT91C_MC_ASR
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.word CONFIG_SYS_MC_ASR_VAL
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- .word MC_AASR
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+ .word AT91C_MC_AASR
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.word CONFIG_SYS_MC_AASR_VAL
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- .word EBI_CFGR
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+ .word AT91C_EBI_CFGR
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.word CONFIG_SYS_EBI_CFGR_VAL
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- .word SMC_CSR0
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+ .word AT91C_SMC_CSR0
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.word CONFIG_SYS_SMC_CSR0_VAL
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- .word PLLAR
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+ .word AT91C_PLLAR
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.word CONFIG_SYS_PLLAR_VAL
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- .word PLLBR
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+ .word AT91C_PLLBR
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.word CONFIG_SYS_PLLBR_VAL
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- .word MCKR
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+ .word AT91C_MCKR
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.word CONFIG_SYS_MCKR_VAL
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/* SMRDATA is 80 bytes long */
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/* here there's a delay of 100 */
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SMRDATA1:
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- .word PIOC_ASR
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+ .word AT91C_PIOC_ASR
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.word CONFIG_SYS_PIOC_ASR_VAL
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- .word PIOC_BSR
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+ .word AT91C_PIOC_BSR
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.word CONFIG_SYS_PIOC_BSR_VAL
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- .word PIOC_PDR
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+ .word AT91C_PIOC_PDR
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.word CONFIG_SYS_PIOC_PDR_VAL
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- .word EBI_CSA
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+ .word AT91C_EBI_CSA
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.word CONFIG_SYS_EBI_CSA_VAL
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- .word SDRC_CR
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+ .word AT91C_SDRC_CR
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.word CONFIG_SYS_SDRC_CR_VAL
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- .word SDRC_MR
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+ .word AT91C_SDRC_MR
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.word CONFIG_SYS_SDRC_MR_VAL
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.word CONFIG_SYS_SDRAM
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.word CONFIG_SYS_SDRAM_VAL
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- .word SDRC_MR
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+ .word AT91C_SDRC_MR
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.word CONFIG_SYS_SDRC_MR_VAL1
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.word CONFIG_SYS_SDRAM
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.word CONFIG_SYS_SDRAM_VAL
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@@ -189,15 +163,15 @@ SMRDATA1:
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.word CONFIG_SYS_SDRAM_VAL
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.word CONFIG_SYS_SDRAM
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.word CONFIG_SYS_SDRAM_VAL
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- .word SDRC_MR
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+ .word AT91C_SDRC_MR
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.word CONFIG_SYS_SDRC_MR_VAL2
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.word CONFIG_SYS_SDRAM1
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.word CONFIG_SYS_SDRAM_VAL
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- .word SDRC_TR
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+ .word AT91C_SDRC_TR
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.word CONFIG_SYS_SDRC_TR_VAL
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.word CONFIG_SYS_SDRAM
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.word CONFIG_SYS_SDRAM_VAL
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- .word SDRC_MR
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+ .word AT91C_SDRC_MR
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.word CONFIG_SYS_SDRC_MR_VAL3
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.word CONFIG_SYS_SDRAM
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.word CONFIG_SYS_SDRAM_VAL
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