sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>

arch/sparc/include/asm/cache.h

@@ -28,4 +28,14 @@
 #include <linux/config.h>
 #include <asm/processor.h>
 
+/*
+ * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment.  Otherwise
+ * use 32-bytes, the cacheline size for Sparc.
+ */
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+#define ARCH_DMA_MINALIGN	CONFIG_SYS_CACHELINE_SIZE
+#else
+#define ARCH_DMA_MINALIGN	32
+#endif
+
 #endif