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@@ -38,11 +38,6 @@
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#define CONFIG_SYS_CLK_FREQ_C110 24000000
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#define CONFIG_SYS_CLK_FREQ_C110 24000000
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#endif
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#endif
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-unsigned long (*get_uart_clk)(int dev_index);
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-unsigned long (*get_pwm_clk)(void);
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-unsigned long (*get_arm_clk)(void);
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-unsigned long (*get_pll_clk)(int);
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-
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/* s5pc110: return pll clock frequency */
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/* s5pc110: return pll clock frequency */
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static unsigned long s5pc100_get_pll_clk(int pllreg)
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static unsigned long s5pc100_get_pll_clk(int pllreg)
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{
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{
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@@ -316,15 +311,28 @@ static unsigned long s5pc1xx_get_pwm_clk(void)
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return s5pc100_get_pclk();
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return s5pc100_get_pclk();
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}
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}
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-void s5p_clock_init(void)
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+unsigned long get_pll_clk(int pllreg)
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{
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{
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- if (cpu_is_s5pc110()) {
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- get_pll_clk = s5pc110_get_pll_clk;
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- get_arm_clk = s5pc110_get_arm_clk;
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- } else {
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- get_pll_clk = s5pc100_get_pll_clk;
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- get_arm_clk = s5pc100_get_arm_clk;
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- }
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- get_uart_clk = s5pc1xx_get_uart_clk;
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- get_pwm_clk = s5pc1xx_get_pwm_clk;
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+ if (cpu_is_s5pc110())
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+ return s5pc110_get_pll_clk(pllreg);
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+ else
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+ return s5pc100_get_pll_clk(pllreg);
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+}
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+
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+unsigned long get_arm_clk(void)
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+{
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+ if (cpu_is_s5pc110())
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+ return s5pc110_get_arm_clk();
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+ else
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+ return s5pc100_get_arm_clk();
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+}
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+
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+unsigned long get_pwm_clk(void)
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+{
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+ return s5pc1xx_get_pwm_clk();
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+}
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+
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+unsigned long get_uart_clk(int dev_index)
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+{
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+ return s5pc1xx_get_uart_clk(dev_index);
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}
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}
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