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+/*
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+ * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
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+ * Copyright (C) 2011-2012 Xilinx, Inc. All rights reserved.
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+ *
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+ * (C) Copyright 2008
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+ * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
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+ *
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+ * (C) Copyright 2004
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+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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+ *
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+ * (C) Copyright 2002-2004
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+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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+ *
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+ * (C) Copyright 2003
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+ * Texas Instruments <www.ti.com>
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+ *
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+ * (C) Copyright 2002
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+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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+ * Marius Groeger <mgroeger@sysgo.de>
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+ *
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+ * (C) Copyright 2002
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+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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+ * Alex Zuepke <azu@sysgo.de>
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#include <common.h>
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+#include <div64.h>
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+#include <asm/io.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+struct scu_timer {
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+ u32 load; /* Timer Load Register */
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+ u32 counter; /* Timer Counter Register */
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+ u32 control; /* Timer Control Register */
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+};
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+
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+static struct scu_timer *timer_base =
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+ (struct scu_timer *) CONFIG_SCUTIMER_BASEADDR;
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+
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+#define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */
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+#define SCUTIMER_CONTROL_PRESCALER_SHIFT 8
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+#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */
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+#define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */
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+
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+#define TIMER_LOAD_VAL 0xFFFFFFFF
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+#define TIMER_PRESCALE 255
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+#define TIMER_TICK_HZ (CONFIG_CPU_FREQ_HZ / 2 / TIMER_PRESCALE)
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+
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+int timer_init(void)
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+{
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+ const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
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+ (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) |
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+ SCUTIMER_CONTROL_ENABLE_MASK;
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+
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+ /* Load the timer counter register */
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+ writel(0xFFFFFFFF, &timer_base->counter);
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+
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+ /*
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+ * Start the A9Timer device
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+ * Enable Auto reload mode, Clear prescaler control bits
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+ * Set prescaler value, Enable the decrementer
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+ */
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+ clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK,
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+ emask);
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+
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+ /* Reset time */
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+ gd->lastinc = readl(&timer_base->counter) /
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+ (TIMER_TICK_HZ / CONFIG_SYS_HZ);
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+ gd->tbl = 0;
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+
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+ return 0;
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+}
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+
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+/*
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+ * This function is derived from PowerPC code (read timebase as long long).
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+ * On ARM it just returns the timer value.
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+ */
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+ulong get_timer_masked(void)
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+{
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+ ulong now;
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+
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+ now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ);
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+
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+ if (gd->lastinc >= now) {
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+ /* Normal mode */
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+ gd->tbl += gd->lastinc - now;
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+ } else {
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+ /* We have an overflow ... */
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+ gd->tbl += gd->lastinc + TIMER_LOAD_VAL - now;
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+ }
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+ gd->lastinc = now;
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+
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+ return gd->tbl;
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+}
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+
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+void __udelay(unsigned long usec)
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+{
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+ unsigned long long tmp;
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+ ulong tmo;
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+
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+ tmo = usec / (1000000 / CONFIG_SYS_HZ);
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+ tmp = get_ticks() + tmo; /* Get current timestamp */
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+
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+ while (get_ticks() < tmp) { /* Loop till event */
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+ /* NOP */;
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+ }
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+}
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+
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+/* Timer without interrupts */
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+ulong get_timer(ulong base)
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+{
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+ return get_timer_masked() - base;
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+}
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+
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+/*
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+ * This function is derived from PowerPC code (read timebase as long long).
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+ * On ARM it just returns the timer value.
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+ */
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+unsigned long long get_ticks(void)
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+{
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+ return get_timer(0);
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+}
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+
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+/*
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+ * This function is derived from PowerPC code (timebase clock frequency).
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+ * On ARM it returns the number of timer ticks per second.
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+ */
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+ulong get_tbclk(void)
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+{
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+ return CONFIG_SYS_HZ;
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+}
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