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@@ -294,6 +294,10 @@ struct mxc_ccm_reg {
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#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7)
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#define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET 0
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+#define CHSCCDR_CLK_SEL_LDB_DI0 3
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+#define CHSCCDR_PODF_DIVIDE_BY_3 2
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+#define CHSCCDR_IPU_PRE_CLK_540M_PFD 5
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+
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/* Define the bits in register CSCDR2 */
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#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK (0x3F << 19)
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#define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET 19
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Eric Nelson