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@@ -1,5 +1,5 @@
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/*
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- * Copyright 2007-2010 Freescale Semiconductor, Inc.
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+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@@ -45,6 +45,10 @@
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#define CONFIG_SYS_TEXT_BASE 0xeff80000
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#endif
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+#define CONFIG_SYS_SRIO
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+#define CONFIG_SRIO1 /* SRIO port 1 */
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+#define CONFIG_SRIO2 /* SRIO port 2 */
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+
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#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
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#define CONFIG_PCI 1 /* Enable PCI/PCIE */
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#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
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@@ -472,6 +476,24 @@
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#define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
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#endif
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+/* SRIO1 uses the same window as PCIE2 mem window */
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+#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000
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+#ifdef CONFIG_PHYS_64BIT
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+#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull
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+#else
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+#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000
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+#endif
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+#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
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+
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+/* SRIO2 uses the same window as PCIE1 mem window */
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+#define CONFIG_SYS_SRIO2_MEM_VIRT 0xc0000000
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+#ifdef CONFIG_PHYS_64BIT
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+#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc40000000ull
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+#else
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+#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc0000000
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+#endif
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+#define CONFIG_SYS_SRIO2_MEM_SIZE 0x20000000 /* 512M */
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+
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#define CONFIG_NET_MULTI
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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