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@@ -31,6 +31,51 @@
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#ifndef __KERNEL_STRICT_NAMES
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#ifndef __ASSEMBLY__
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+struct gpmc_cs {
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+ u32 config1; /* 0x00 */
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+ u32 config2; /* 0x04 */
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+ u32 config3; /* 0x08 */
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+ u32 config4; /* 0x0C */
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+ u32 config5; /* 0x10 */
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+ u32 config6; /* 0x14 */
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+ u32 config7; /* 0x18 */
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+ u32 nand_cmd; /* 0x1C */
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+ u32 nand_adr; /* 0x20 */
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+ u32 nand_dat; /* 0x24 */
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+ u8 res[8]; /* blow up to 0x30 byte */
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+};
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+
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+struct gpmc {
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+ u8 res1[0x10];
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+ u32 sysconfig; /* 0x10 */
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+ u8 res2[0x4];
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+ u32 irqstatus; /* 0x18 */
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+ u32 irqenable; /* 0x1C */
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+ u8 res3[0x20];
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+ u32 timeout_control; /* 0x40 */
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+ u8 res4[0xC];
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+ u32 config; /* 0x50 */
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+ u32 status; /* 0x54 */
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+ u8 res5[0x8]; /* 0x58 */
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+ struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */
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+ u8 res6[0x14]; /* 0x1E0 */
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+ u32 ecc_config; /* 0x1F4 */
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+ u32 ecc_control; /* 0x1F8 */
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+ u32 ecc_size_config; /* 0x1FC */
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+ u32 ecc1_result; /* 0x200 */
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+ u32 ecc2_result; /* 0x204 */
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+ u32 ecc3_result; /* 0x208 */
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+ u32 ecc4_result; /* 0x20C */
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+ u32 ecc5_result; /* 0x210 */
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+ u32 ecc6_result; /* 0x214 */
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+ u32 ecc7_result; /* 0x218 */
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+ u32 ecc8_result; /* 0x21C */
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+ u32 ecc9_result; /* 0x220 */
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+};
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+
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+/* Used for board specific gpmc initialization */
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+extern struct gpmc *gpmc_cfg;
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+
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struct gptimer {
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u32 tidr; /* 0x00 r */
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u8 res[0xc];
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@@ -86,6 +131,9 @@ struct watchdog {
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#define TCLR_AR (0x1 << 1)
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#define TCLR_PRE (0x1 << 5)
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+/* GPMC BASE */
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+#define GPMC_BASE (OMAP44XX_GPMC_BASE)
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+
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/* I2C base */
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#define I2C_BASE1 (OMAP44XX_L4_PER_BASE + 0x70000)
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#define I2C_BASE2 (OMAP44XX_L4_PER_BASE + 0x72000)
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