ARM DaVinci: Move common functions to board/davinci/common

ARM DaVinci: Move common functions to board/davinci/common.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>

board/davinci/common/Makefile

@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
+endif
+
+LIB	= $(obj)lib$(VENDOR).a
+
+COBJS	:= psc.o misc.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/davinci/common/misc.c

@@ -0,0 +1,126 @@
+/*
+ * Miscelaneous DaVinci functions.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return(0);
+}
+
+static int dv_get_pllm_output(uint32_t pllm)
+{
+	return (pllm + 1) * (CFG_HZ_CLOCK / 1000000);
+}
+
+void dv_display_clk_infos(void)
+{
+	printf("ARM Clock: %dMHz\n", dv_get_pllm_output(REG(PLL1_PLLM)) / 2);
+	printf("DDR Clock: %dMHz\n", dv_get_pllm_output(REG(PLL2_PLLM)) /
+	       ((REG(PLL2_DIV2) & 0x1f) + 1) / 2);
+}
+
+/* Read ethernet MAC address from EEPROM for DVEVM compatible boards.
+ * Returns 1 if found, 0 otherwise.
+ */
+int dvevm_read_mac_address(uint8_t *buf)
+{
+#ifdef CFG_I2C_EEPROM_ADDR
+	/* Read MAC address. */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7F00, CFG_I2C_EEPROM_ADDR_LEN,
+		     (uint8_t *) &buf[0], 6))
+		goto i2cerr;
+
+	/* Check that MAC address is not null. */
+	if (memcmp(buf, "\0\0\0\0\0\0", 6) == 0)
+		goto err;
+
+	return 1; /* Found */
+
+i2cerr:
+	printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR);
+err:
+#endif /* CFG_I2C_EEPROM_ADDR */
+
+	return 0;
+}
+
+/* If there is a MAC address in the environment, and if it is not identical to
+ * the MAC address in the ROM, then a warning is printed and the MAC address
+ * from the environment is used.
+ *
+ * If there is no MAC address in the environment, then it will be initialized
+ * (silently) from the value in the ROM.
+ */
+void dv_configure_mac_address(uint8_t *rom_enetaddr)
+{
+	int i;
+	u_int8_t env_enetaddr[6];
+	char *tmp = getenv("ethaddr");
+	char *end;
+
+	/* Read Ethernet MAC address from the U-Boot environment.
+	 * If it is not defined, env_enetaddr[] will be cleared. */
+	for (i = 0; i < 6; i++) {
+		env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
+		if (tmp)
+			tmp = (*end) ? end+1 : end;
+	}
+
+	/* Check if ROM and U-Boot environment MAC addresses match. */
+	if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
+	    memcmp(env_enetaddr, rom_enetaddr, 6) != 0) {
+		printf("Warning: MAC addresses don't match:\n");
+		printf("  ROM MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+		       rom_enetaddr[0], rom_enetaddr[1],
+		       rom_enetaddr[2], rom_enetaddr[3],
+		       rom_enetaddr[4], rom_enetaddr[5]);
+		printf("  \"ethaddr\" value: %02X:%02X:%02X:%02X:%02X:%02X\n",
+		       env_enetaddr[0], env_enetaddr[1],
+		       env_enetaddr[2], env_enetaddr[3],
+		       env_enetaddr[4], env_enetaddr[5]) ;
+		debug("### Using MAC address from environment\n");
+	}
+	if (!tmp) {
+		char ethaddr[20];
+
+		/* There is no MAC address in the environment, so we initialize
+		 * it from the value in the ROM. */
+		sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
+			rom_enetaddr[0], rom_enetaddr[1],
+			rom_enetaddr[2], rom_enetaddr[3],
+			rom_enetaddr[4], rom_enetaddr[5]) ;
+		debug("### Setting environment from ROM MAC address = \"%s\"\n",
+		      ethaddr);
+		setenv("ethaddr", ethaddr);
+	}
+}

board/davinci/common/misc.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __MISC_H
+#define __MISC_H
+
+extern void timer_init(void);
+extern int eth_hw_init(void);
+
+void dv_display_clk_infos(void);
+int dvevm_read_mac_address(uint8_t *buf);
+void dv_configure_mac_address(uint8_t *rom_enetaddr);
+
+#endif /* __MISC_H */

board/davinci/common/psc.c

@@ -0,0 +1,117 @@
+/*
+ * Power and Sleep Controller (PSC) functions.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+
+/*
+ * The DM6446 includes two separate power domains: "Always On" and "DSP". The
+ * "Always On" power domain is always on when the chip is on. The "Always On"
+ * domain is powered by the VDD pins of the DM6446. The majority of the
+ * DM6446's modules lie within the "Always On" power domain. A separate
+ * domain called the "DSP" domain houses the C64x+ and VICP. The "DSP" domain
+ * is not always on. The "DSP" power domain is powered by the CVDDDSP pins of
+ * the DM6446.
+ */
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+	dv_reg_p mdstat, mdctl;
+
+	if (id >= DAVINCI_LPSC_GEM)
+		return;			/* Don't work on DSP Power Domain */
+
+	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+	while (REG(PSC_PTSTAT) & 0x01);
+
+	if ((*mdstat & 0x1f) == 0x03)
+		return;			/* Already on and enabled */
+
+	*mdctl |= 0x03;
+
+	/* Special treatment for some modules as for sprue14 p.7.4.2 */
+	switch (id) {
+	case DAVINCI_LPSC_VPSSSLV:
+	case DAVINCI_LPSC_EMAC:
+	case DAVINCI_LPSC_EMAC_WRAPPER:
+	case DAVINCI_LPSC_MDIO:
+	case DAVINCI_LPSC_USB:
+	case DAVINCI_LPSC_ATA:
+	case DAVINCI_LPSC_VLYNQ:
+	case DAVINCI_LPSC_UHPI:
+	case DAVINCI_LPSC_DDR_EMIF:
+	case DAVINCI_LPSC_AEMIF:
+	case DAVINCI_LPSC_MMC_SD:
+	case DAVINCI_LPSC_MEMSTICK:
+	case DAVINCI_LPSC_McBSP:
+	case DAVINCI_LPSC_GPIO:
+		*mdctl |= 0x200;
+		break;
+	}
+
+	REG(PSC_PTCMD) = 0x01;
+
+	while (REG(PSC_PTSTAT) & 0x03);
+	while ((*mdstat & 0x1f) != 0x03);	/* Probably an overkill... */
+}
+
+/* If DSPLINK is used, we don't want U-Boot to power on the DSP. */
+#if !defined(CFG_USE_DSPLINK)
+void dsp_on(void)
+{
+	int i;
+
+	if (REG(PSC_PDSTAT1) & 0x1f)
+		return;			/* Already on */
+
+	REG(PSC_GBLCTL) |= 0x01;
+	REG(PSC_PDCTL1) |= 0x01;
+	REG(PSC_PDCTL1) &= ~0x100;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+	REG(PSC_PTCMD) = 0x02;
+
+	for (i = 0; i < 100; i++) {
+		if (REG(PSC_EPCPR) & 0x02)
+			break;
+	}
+
+	REG(PSC_CHP_SHRTSW) = 0x01;
+	REG(PSC_PDCTL1) |= 0x100;
+	REG(PSC_EPCCR) = 0x02;
+
+	for (i = 0; i < 100; i++) {
+		if (!(REG(PSC_PTSTAT) & 0x02))
+			break;
+	}
+
+	REG(PSC_GBLCTL) &= ~0x1f;
+}
+#endif /* CFG_USE_DSPLINK */

board/davinci/common/psc.h

@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __PSC_H
+#define __PSC_H
+
+void lpsc_on(unsigned int id);
+void dsp_on(void);
+
+#endif /* __PSC_H */

board/davinci/dv-evm/dv_board.c

@@ -28,89 +28,11 @@
 #include <i2c.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
+#include "../common/psc.h"
+#include "../common/misc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void	timer_init(void);
-extern int	eth_hw_init(void);
-
-
-/* Works on Always On power domain only (no PD argument) */
-void lpsc_on(unsigned int id)
-{
-	dv_reg_p	mdstat, mdctl;
-
-	if (id >= DAVINCI_LPSC_GEM)
-		return;			/* Don't work on DSP Power Domain */
-
-	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-
-	while (REG(PSC_PTSTAT) & 0x01) {;}
-
-	if ((*mdstat & 0x1f) == 0x03)
-		return;			/* Already on and enabled */
-
-	*mdctl |= 0x03;
-
-	/* Special treatment for some modules as for sprue14 p.7.4.2 */
-	if (	(id == DAVINCI_LPSC_VPSSSLV) ||
-		(id == DAVINCI_LPSC_EMAC) ||
-		(id == DAVINCI_LPSC_EMAC_WRAPPER) ||
-		(id == DAVINCI_LPSC_MDIO) ||
-		(id == DAVINCI_LPSC_USB) ||
-		(id == DAVINCI_LPSC_ATA) ||
-		(id == DAVINCI_LPSC_VLYNQ) ||
-		(id == DAVINCI_LPSC_UHPI) ||
-		(id == DAVINCI_LPSC_DDR_EMIF) ||
-		(id == DAVINCI_LPSC_AEMIF) ||
-		(id == DAVINCI_LPSC_MMC_SD) ||
-		(id == DAVINCI_LPSC_MEMSTICK) ||
-		(id == DAVINCI_LPSC_McBSP) ||
-		(id == DAVINCI_LPSC_GPIO)
-	   )
-		*mdctl |= 0x200;
-
-	REG(PSC_PTCMD) = 0x01;
-
-	while (REG(PSC_PTSTAT) & 0x03) {;}
-	while ((*mdstat & 0x1f) != 0x03) {;}	/* Probably an overkill... */
-}
-
-void dsp_on(void)
-{
-	int	i;
-
-	if (REG(PSC_PDSTAT1) & 0x1f)
-		return;			/* Already on */
-
-	REG(PSC_GBLCTL) |= 0x01;
-	REG(PSC_PDCTL1) |= 0x01;
-	REG(PSC_PDCTL1) &= ~0x100;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-	REG(PSC_PTCMD) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (REG(PSC_EPCPR) & 0x02)
-			break;
-	}
-
-	REG(PSC_CHP_SHRTSW) = 0x01;
-	REG(PSC_PDCTL1) |= 0x100;
-	REG(PSC_EPCCR) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (!(REG(PSC_PTSTAT) & 0x02))
-			break;
-	}
-
-	REG(PSC_GBLCTL) &= ~0x1f;
-}
-
-
 int board_init(void)
 {
 	/* arch number of the board */
@@ -131,8 +53,10 @@ int board_init(void)
 	lpsc_on(DAVINCI_LPSC_TIMER1);
 	lpsc_on(DAVINCI_LPSC_GPIO);
 
+#if !defined(CFG_USE_DSPLINK)
 	/* Powerup the DSP */
 	dsp_on();
+#endif /* CFG_USE_DSPLINK */
 
 	/* Bringup UART0 out of reset */
 	REG(UART0_PWREMU_MGMT) = 0x0000e003;
@@ -157,46 +81,23 @@ int board_init(void)
 	return(0);
 }
 
-int misc_init_r (void)
+int misc_init_r(void)
 {
-	u_int8_t	tmp[20], buf[10];
-	int		i = 0;
-	int		clk = 0;
-
-	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-
-	printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
-	printf ("DDR Clock : %dMHz\n", (clk / 2));
-
-	/* Set Ethernet MAC address from EEPROM */
-	if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
-		printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
-	} else {
-		tmp[0] = 0xff;
-		for (i = 0; i < 6; i++)
-			tmp[0] &= buf[i];
-
-		if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
-			sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
-				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
-			setenv("ethaddr", (char *)&tmp[0]);
-		}
-	}
+	uint8_t video_mode;
+	uint8_t eeprom_enetaddr[6];
 
-	if (!eth_hw_init())
-		printf("ethernet init failed!\n");
+	dv_display_clk_infos();
 
-	i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1);
+	/* Read Ethernet MAC address from EEPROM if available. */
+	if (dvevm_read_mac_address(eeprom_enetaddr))
+		dv_configure_mac_address(eeprom_enetaddr);
 
-	setenv ("videostd", ((i  & 0x80) ? "pal" : "ntsc"));
+	if (!eth_hw_init())
+		printf("ethernet init failed!\n");
 
-	return(0);
-}
+	i2c_read(0x39, 0x00, 1, &video_mode, 1);
 
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+	setenv("videostd", ((video_mode & 0x80) ? "pal" : "ntsc"));
 
 	return(0);
 }

board/davinci/schmoogie/dv_board.c

@@ -28,89 +28,11 @@
 #include <i2c.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
+#include "../common/psc.h"
+#include "../common/misc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void	timer_init(void);
-extern int	eth_hw_init(void);
-
-
-/* Works on Always On power domain only (no PD argument) */
-void lpsc_on(unsigned int id)
-{
-	dv_reg_p	mdstat, mdctl;
-
-	if (id >= DAVINCI_LPSC_GEM)
-		return;			/* Don't work on DSP Power Domain */
-
-	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-
-	while (REG(PSC_PTSTAT) & 0x01) {;}
-
-	if ((*mdstat & 0x1f) == 0x03)
-		return;			/* Already on and enabled */
-
-	*mdctl |= 0x03;
-
-	/* Special treatment for some modules as for sprue14 p.7.4.2 */
-	if (	(id == DAVINCI_LPSC_VPSSSLV) ||
-		(id == DAVINCI_LPSC_EMAC) ||
-		(id == DAVINCI_LPSC_EMAC_WRAPPER) ||
-		(id == DAVINCI_LPSC_MDIO) ||
-		(id == DAVINCI_LPSC_USB) ||
-		(id == DAVINCI_LPSC_ATA) ||
-		(id == DAVINCI_LPSC_VLYNQ) ||
-		(id == DAVINCI_LPSC_UHPI) ||
-		(id == DAVINCI_LPSC_DDR_EMIF) ||
-		(id == DAVINCI_LPSC_AEMIF) ||
-		(id == DAVINCI_LPSC_MMC_SD) ||
-		(id == DAVINCI_LPSC_MEMSTICK) ||
-		(id == DAVINCI_LPSC_McBSP) ||
-		(id == DAVINCI_LPSC_GPIO)
-	   )
-		*mdctl |= 0x200;
-
-	REG(PSC_PTCMD) = 0x01;
-
-	while (REG(PSC_PTSTAT) & 0x03) {;}
-	while ((*mdstat & 0x1f) != 0x03) {;}	/* Probably an overkill... */
-}
-
-void dsp_on(void)
-{
-	int	i;
-
-	if (REG(PSC_PDSTAT1) & 0x1f)
-		return;			/* Already on */
-
-	REG(PSC_GBLCTL) |= 0x01;
-	REG(PSC_PDCTL1) |= 0x01;
-	REG(PSC_PDCTL1) &= ~0x100;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-	REG(PSC_PTCMD) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (REG(PSC_EPCPR) & 0x02)
-			break;
-	}
-
-	REG(PSC_CHP_SHRTSW) = 0x01;
-	REG(PSC_PDCTL1) |= 0x100;
-	REG(PSC_EPCCR) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (!(REG(PSC_PTSTAT) & 0x02))
-			break;
-	}
-
-	REG(PSC_GBLCTL) &= ~0x1f;
-}
-
-
 int board_init(void)
 {
 	/* arch number of the board */
@@ -131,8 +53,10 @@ int board_init(void)
 	lpsc_on(DAVINCI_LPSC_TIMER1);
 	lpsc_on(DAVINCI_LPSC_GPIO);
 
+#if !defined(CFG_USE_DSPLINK)
 	/* Powerup the DSP */
 	dsp_on();
+#endif /* CFG_USE_DSPLINK */
 
 	/* Bringup UART0 out of reset */
 	REG(UART0_PWREMU_MGMT) = 0x0000e003;
@@ -157,11 +81,10 @@ int board_init(void)
 	return(0);
 }
 
-int misc_init_r (void)
+int misc_init_r(void)
 {
 	u_int8_t	tmp[20], buf[10];
 	int		i = 0;
-	int		clk = 0;
 
 	/* Set serial number from UID chip */
 	u_int8_t	crc_tbl[256] = {
@@ -199,17 +122,15 @@ int misc_init_r (void)
 			0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35
 		};
 
-	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-
-	printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
-	printf ("DDR Clock : %dMHz\n", (clk / 2));
+	dv_display_clk_infos();
 
 	/* Set serial number from UID chip */
 	if (i2c_read(CFG_UID_ADDR, 0, 1, buf, 8)) {
 		printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR);
 		forceenv("serial#", "FAILED");
 	} else {
-		if (buf[0] != 0x70) {	/* Device Family Code */
+		if (buf[0] != 0x70) {
+			/* Device Family Code */
 			printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR);
 			forceenv("serial#", "FAILED");
 		}
@@ -234,11 +155,3 @@ int misc_init_r (void)
 
 	return(0);
 }
-
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return(0);
-}

board/davinci/sffsdr/sffsdr.c

@@ -31,6 +31,8 @@
 #include <i2c.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
+#include "../common/psc.h"
+#include "../common/misc.h"
 
 #define DAVINCI_A3CR     (0x01E00014)	/* EMIF-A CS3 config register. */
 #define DAVINCI_A3CR_VAL (0x3FFFFFFD)	/* EMIF-A CS3 value for FPGA. */
@@ -41,89 +43,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void timer_init(void);
-extern int eth_hw_init(void);
-
-
-/* Works on Always On power domain only (no PD argument) */
-void lpsc_on(unsigned int id)
-{
-	dv_reg_p mdstat, mdctl;
-
-	if (id >= DAVINCI_LPSC_GEM)
-		return;			/* Don't work on DSP Power Domain */
-
-	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-
-	while (REG(PSC_PTSTAT) & 0x01);
-
-	if ((*mdstat & 0x1f) == 0x03)
-		return;			/* Already on and enabled */
-
-	*mdctl |= 0x03;
-
-	/* Special treatment for some modules as for sprue14 p.7.4.2 */
-	switch (id) {
-	case DAVINCI_LPSC_VPSSSLV:
-	case DAVINCI_LPSC_EMAC:
-	case DAVINCI_LPSC_EMAC_WRAPPER:
-	case DAVINCI_LPSC_MDIO:
-	case DAVINCI_LPSC_USB:
-	case DAVINCI_LPSC_ATA:
-	case DAVINCI_LPSC_VLYNQ:
-	case DAVINCI_LPSC_UHPI:
-	case DAVINCI_LPSC_DDR_EMIF:
-	case DAVINCI_LPSC_AEMIF:
-	case DAVINCI_LPSC_MMC_SD:
-	case DAVINCI_LPSC_MEMSTICK:
-	case DAVINCI_LPSC_McBSP:
-	case DAVINCI_LPSC_GPIO:
-		*mdctl |= 0x200;
-		break;
-	}
-
-	REG(PSC_PTCMD) = 0x01;
-
-	while (REG(PSC_PTSTAT) & 0x03);
-	while ((*mdstat & 0x1f) != 0x03);	/* Probably an overkill... */
-}
-
-#if !defined(CFG_USE_DSPLINK)
-void dsp_on(void)
-{
-	int i;
-
-	if (REG(PSC_PDSTAT1) & 0x1f)
-		return;			/* Already on */
-
-	REG(PSC_GBLCTL) |= 0x01;
-	REG(PSC_PDCTL1) |= 0x01;
-	REG(PSC_PDCTL1) &= ~0x100;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-	REG(PSC_PTCMD) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (REG(PSC_EPCPR) & 0x02)
-			break;
-	}
-
-	REG(PSC_CHP_SHRTSW) = 0x01;
-	REG(PSC_PDCTL1) |= 0x100;
-	REG(PSC_EPCCR) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (!(REG(PSC_PTSTAT) & 0x02))
-			break;
-	}
-
-	REG(PSC_GBLCTL) &= ~0x1f;
-}
-#endif /* CFG_USE_DSPLINK */
-
 int board_init(void)
 {
 	/* arch number of the board */
@@ -172,8 +91,10 @@ int board_init(void)
 	return(0);
 }
 
-/* Read ethernet MAC address from Integrity data structure inside EEPROM. */
-int read_mac_address(uint8_t *buf)
+/* Read ethernet MAC address from Integrity data structure inside EEPROM.
+ * Returns 1 if found, 0 otherwise.
+ */
+static int sffsdr_read_mac_address(uint8_t *buf)
 {
 	u_int32_t value, mac[2], address;
 
@@ -182,7 +103,7 @@ int read_mac_address(uint8_t *buf)
 		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
 		goto err;
 	if (value != INTEGRITY_CHECKWORD_VALUE)
-		return 1;
+		return 0;
 
 	/* Read SYSCFG structure offset. */
 	if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
@@ -216,30 +137,23 @@ int read_mac_address(uint8_t *buf)
 	buf[4] = mac[1] >> 24;
 	buf[5] = mac[1] >> 16;
 
-	return 0;
+	return 1; /* Found */
 
 err:
 	printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR);
-	return 1;
+	return 0;
 }
 
 /* Platform dependent initialisation. */
 int misc_init_r(void)
 {
-	int i;
-	u_int8_t i2cbuf;
-	u_int8_t env_enetaddr[6], eeprom_enetaddr[6];
-	char *tmp = getenv("ethaddr");
-	char *end;
-	int clk;
+	uint8_t i2cbuf;
+	uint8_t eeprom_enetaddr[6];
 
 	/* EMIF-A CS3 configuration for FPGA. */
 	REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
 
-	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-
-	printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
-	printf("DDR Clock: %dMHz\n", (clk / 2));
+	dv_display_clk_infos();
 
 	/* Configure I2C switch (PCA9543) to enable channel 0. */
 	i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0;
@@ -249,43 +163,9 @@ int misc_init_r(void)
 		return 1;
 	}
 
-	/* Read Ethernet MAC address from the U-Boot environment. */
-	for (i = 0; i < 6; i++) {
-		env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
-		if (tmp)
-			tmp = (*end) ? end+1 : end;
-	}
-
-	/* Read Ethernet MAC address from EEPROM. */
-	if (read_mac_address(eeprom_enetaddr) == 0) {
-		if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
-		    memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) {
-			printf("\nWarning: MAC addresses don't match:\n");
-			printf("\tHW MAC address:  "
-			       "%02X:%02X:%02X:%02X:%02X:%02X\n",
-			       eeprom_enetaddr[0], eeprom_enetaddr[1],
-			       eeprom_enetaddr[2], eeprom_enetaddr[3],
-			       eeprom_enetaddr[4], eeprom_enetaddr[5]);
-			printf("\t\"ethaddr\" value: "
-			       "%02X:%02X:%02X:%02X:%02X:%02X\n",
-			       env_enetaddr[0], env_enetaddr[1],
-			       env_enetaddr[2], env_enetaddr[3],
-			       env_enetaddr[4], env_enetaddr[5]) ;
-			debug("### Set MAC addr from environment\n");
-			memcpy(eeprom_enetaddr, env_enetaddr, 6);
-		}
-		if (!tmp) {
-			char ethaddr[20];
-
-			sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
-				eeprom_enetaddr[0], eeprom_enetaddr[1],
-				eeprom_enetaddr[2], eeprom_enetaddr[3],
-				eeprom_enetaddr[4], eeprom_enetaddr[5]) ;
-			debug("### Set environment from HW MAC addr = \"%s\"\n",
-			      ethaddr);
-			setenv("ethaddr", ethaddr);
-		}
-	}
+	/* Read Ethernet MAC address from EEPROM if available. */
+	if (sffsdr_read_mac_address(eeprom_enetaddr))
+		dv_configure_mac_address(eeprom_enetaddr);
 
 	if (!eth_hw_init())
 		printf("Ethernet init failed\n");
@@ -296,11 +176,3 @@ int misc_init_r(void)
 
 	return(0);
 }
-
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return(0);
-}

board/davinci/sonata/dv_board.c

@@ -25,92 +25,13 @@
  */
 
 #include <common.h>
-#include <i2c.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
+#include "../common/psc.h"
+#include "../common/misc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void	timer_init(void);
-extern int	eth_hw_init(void);
-
-
-/* Works on Always On power domain only (no PD argument) */
-void lpsc_on(unsigned int id)
-{
-	dv_reg_p	mdstat, mdctl;
-
-	if (id >= DAVINCI_LPSC_GEM)
-		return;			/* Don't work on DSP Power Domain */
-
-	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-
-	while (REG(PSC_PTSTAT) & 0x01) {;}
-
-	if ((*mdstat & 0x1f) == 0x03)
-		return;			/* Already on and enabled */
-
-	*mdctl |= 0x03;
-
-	/* Special treatment for some modules as for sprue14 p.7.4.2 */
-	if (	(id == DAVINCI_LPSC_VPSSSLV) ||
-		(id == DAVINCI_LPSC_EMAC) ||
-		(id == DAVINCI_LPSC_EMAC_WRAPPER) ||
-		(id == DAVINCI_LPSC_MDIO) ||
-		(id == DAVINCI_LPSC_USB) ||
-		(id == DAVINCI_LPSC_ATA) ||
-		(id == DAVINCI_LPSC_VLYNQ) ||
-		(id == DAVINCI_LPSC_UHPI) ||
-		(id == DAVINCI_LPSC_DDR_EMIF) ||
-		(id == DAVINCI_LPSC_AEMIF) ||
-		(id == DAVINCI_LPSC_MMC_SD) ||
-		(id == DAVINCI_LPSC_MEMSTICK) ||
-		(id == DAVINCI_LPSC_McBSP) ||
-		(id == DAVINCI_LPSC_GPIO)
-	   )
-		*mdctl |= 0x200;
-
-	REG(PSC_PTCMD) = 0x01;
-
-	while (REG(PSC_PTSTAT) & 0x03) {;}
-	while ((*mdstat & 0x1f) != 0x03) {;}	/* Probably an overkill... */
-}
-
-void dsp_on(void)
-{
-	int	i;
-
-	if (REG(PSC_PDSTAT1) & 0x1f)
-		return;			/* Already on */
-
-	REG(PSC_GBLCTL) |= 0x01;
-	REG(PSC_PDCTL1) |= 0x01;
-	REG(PSC_PDCTL1) &= ~0x100;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-	REG(PSC_PTCMD) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (REG(PSC_EPCPR) & 0x02)
-			break;
-	}
-
-	REG(PSC_CHP_SHRTSW) = 0x01;
-	REG(PSC_PDCTL1) |= 0x100;
-	REG(PSC_EPCCR) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (!(REG(PSC_PTSTAT) & 0x02))
-			break;
-	}
-
-	REG(PSC_GBLCTL) &= ~0x1f;
-}
-
-
 int board_init(void)
 {
 	/* arch number of the board */
@@ -131,8 +52,10 @@ int board_init(void)
 	lpsc_on(DAVINCI_LPSC_TIMER1);
 	lpsc_on(DAVINCI_LPSC_GPIO);
 
+#if !defined(CFG_USE_DSPLINK)
 	/* Powerup the DSP */
 	dsp_on();
+#endif /* CFG_USE_DSPLINK */
 
 	/* Bringup UART0 out of reset */
 	REG(UART0_PWREMU_MGMT) = 0x0000e003;
@@ -157,43 +80,18 @@ int board_init(void)
 	return(0);
 }
 
-int misc_init_r (void)
+int misc_init_r(void)
 {
-	u_int8_t	tmp[20], buf[10];
-	int		i = 0;
-	int		clk = 0;
+	uint8_t eeprom_enetaddr[6];
 
+	dv_display_clk_infos();
 
-	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-
-	printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
-	printf ("DDR Clock : %dMHz\n", (clk / 2));
-
-	/* Set Ethernet MAC address from EEPROM */
-	if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
-		printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
-	} else {
-		tmp[0] = 0xff;
-		for (i = 0; i < 6; i++)
-			tmp[0] &= buf[i];
-
-		if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
-			sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
-				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
-			setenv("ethaddr", (char *)&tmp[0]);
-		}
-	}
+	/* Read Ethernet MAC address from EEPROM if available. */
+	if (dvevm_read_mac_address(eeprom_enetaddr))
+		dv_configure_mac_address(eeprom_enetaddr);
 
 	if (!eth_hw_init())
 		printf("ethernet init failed!\n");
 
 	return(0);
 }
-
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return(0);
-}