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@@ -37,11 +37,11 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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typedef unsigned short FLASH_PORT_WIDTH;
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typedef volatile unsigned short FLASH_PORT_WIDTHV;
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-#define FPW FLASH_PORT_WIDTH
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-#define FPWV FLASH_PORT_WIDTHV
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+#define FPW FLASH_PORT_WIDTH
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+#define FPWV FLASH_PORT_WIDTHV
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#define FLASH_CYCLE1 0x0555
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-#define FLASH_CYCLE2 0x02aa
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+#define FLASH_CYCLE2 0x02AA
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/*-----------------------------------------------------------------------
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* Functions
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@@ -96,9 +96,9 @@ static void flash_reset(flash_info_t *info)
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/* Put FLASH back in read mode */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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- *base = (FPW)0x00FF00FF; /* Intel Read Mode */
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+ *base = (FPW)0x00FF; /* Intel Read Mode */
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else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
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- *base = (FPW)0x00F000F0; /* AMD Read Mode */
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+ *base = (FPW)0x00F0; /* AMD Read Mode */
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}
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/*-----------------------------------------------------------------------
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@@ -183,9 +183,9 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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/* Write auto select command: read Manufacturer ID */
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/* Write auto select command sequence and test FLASH answer */
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- addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
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- addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
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- addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
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+ addr[FLASH_CYCLE1] = (FPW)0x00AA; /* for AMD, Intel ignores this */
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+ addr[FLASH_CYCLE2] = (FPW)0x0055; /* for AMD, Intel ignores this */
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+ addr[FLASH_CYCLE1] = (FPW)0x0090; /* selects Intel or AMD */
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/* The manufacturer codes are only 1 byte, so just use 1 byte.
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* This works for any bus width and any FLASH device width.
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@@ -262,7 +262,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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FPWV *addr = (FPWV *)(info->start[0]);
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- int flag, prot, sect, l_sect;
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+ int flag, prot, sect, ssect, l_sect;
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ulong start, now, last;
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printf ("flash_erase: first: %d last: %d\n", s_first, s_last);
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@@ -297,58 +297,70 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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printf ("\n");
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}
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- l_sect = -1;
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-
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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- addr[0x0555] = 0x00AA;
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- addr[0x02AA] = 0x0055;
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- addr[0x0555] = 0x0080;
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- addr[0x0555] = 0x00AA;
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- addr[0x02AA] = 0x0055;
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-
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- /* Start erase on unprotected sectors */
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- for (sect = s_first; sect<=s_last; sect++) {
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- if (info->protect[sect] == 0) { /* not protected */
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- addr = (FPWV *)(info->start[sect]);
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- addr[0] = 0x0030;
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- l_sect = sect;
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+ /*
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+ * Start erase on unprotected sectors.
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+ * Since the flash can erase multiple sectors with one command
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+ * we take advantage of that by doing the erase in chunks of
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+ * 3 sectors.
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+ */
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+ for (sect = s_first; sect <= s_last; ) {
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+ l_sect = -1;
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+
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+ addr[FLASH_CYCLE1] = 0x00AA;
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+ addr[FLASH_CYCLE2] = 0x0055;
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+ addr[FLASH_CYCLE1] = 0x0080;
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+ addr[FLASH_CYCLE1] = 0x00AA;
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+ addr[FLASH_CYCLE2] = 0x0055;
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+
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+ /* do the erase in chunks of at most 3 sectors */
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+ for (ssect = 0; ssect < 3; ssect++) {
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+ if ((sect + ssect) > s_last)
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+ break;
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+ if (info->protect[sect + ssect] == 0) { /* not protected */
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+ addr = (FPWV *)(info->start[sect + ssect]);
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+ addr[0] = 0x0030;
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+ l_sect = sect + ssect;
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+ }
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}
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+ /* wait at least 80us - let's wait 1 ms */
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+ udelay (1000);
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+
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+ /*
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+ * We wait for the last triggered sector
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+ */
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+ if (l_sect < 0)
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+ goto DONE;
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+
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+ start = get_timer (0);
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+ last = start;
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+ addr = (FPWV *)(info->start[l_sect]);
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+ while ((addr[0] & 0x0080) != 0x0080) {
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+ if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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+ printf ("Timeout\n");
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+ return 1;
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+ }
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+ /* show that we're waiting */
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+ if ((now - last) > 1000) { /* every second */
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+ putc ('.');
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+ last = now;
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+ }
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+ }
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+ addr = (FPWV *)info->start[0];
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+ addr[0] = 0x00F0; /* reset bank */
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+ sect += ssect;
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}
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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- /* wait at least 80us - let's wait 1 ms */
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- udelay (1000);
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-
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- /*
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- * We wait for the last triggered sector
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- */
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- if (l_sect < 0)
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- goto DONE;
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-
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- start = get_timer (0);
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- last = start;
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- addr = (FPWV *)(info->start[l_sect]);
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- while ((addr[0] & 0x00000080) != 0x00000080) {
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- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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- printf ("Timeout\n");
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- return 1;
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- }
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- /* show that we're waiting */
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- if ((now - last) > 1000) { /* every second */
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- putc ('.');
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- last = now;
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- }
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- }
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-
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DONE:
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/* reset to read mode */
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addr = (FPWV *)info->start[0];
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- addr[0] = 0x000000F0; /* reset bank */
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+ addr[0] = 0x00F0; /* reset bank */
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printf (" done\n");
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return 0;
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@@ -432,9 +444,9 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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- base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
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- base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
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- base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
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+ base[FLASH_CYCLE1] = (FPW)0x00AA; /* unlock */
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+ base[FLASH_CYCLE2] = (FPW)0x0055; /* unlock */
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+ base[FLASH_CYCLE1] = (FPW)0x00A0; /* selects program mode */
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*dest = data; /* start programming the data */
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@@ -445,9 +457,9 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
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start = get_timer (0);
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/* data polling for D7 */
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- while ((*dest & (FPW)0x00000080) != (data & (FPW)0x00000080)) {
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+ while ((*dest & (FPW)0x0080) != (data & (FPW)0x0080)) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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- *dest = (FPW)0x000000F0; /* reset bank */
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+ *dest = (FPW)0x00F0; /* reset bank */
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return (1);
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}
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}
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wdenk