xes: Update Freescale DDR code to work with 86xx processors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

board/xes/common/Makefile

@@ -31,7 +31,7 @@ LIB	= $(obj)lib$(VENDOR).a
 
 COBJS-$(CONFIG_FSL_PCI_INIT)	+= fsl_8xxx_pci.o
 COBJS-$(CONFIG_MPC8572)		+= fsl_8572_clk.o
-COBJS-$(CONFIG_MPC85xx)		+= fsl_85xx_ddr.o
+COBJS-$(CONFIG_FSL_DDR2)	+= fsl_8xxx_ddr.o
 COBJS-$(CONFIG_NAND_ACTL)	+= actl_nand.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)

board/xes/common/fsl_85xx_ddr.c → board/xes/common/fsl_8xxx_ddr.c

@@ -32,9 +32,10 @@ phys_size_t initdram(int board_type)
 {
 	phys_size_t dram_size = fsl_ddr_sdram();
 
+#ifdef CONFIG_MPC85xx
 	dram_size = setup_ddr_tlbs(dram_size / 0x100000);
-
 	dram_size *= 0x100000;
+#endif
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 	/* Initialize and enable DDR ECC */
@@ -48,7 +49,12 @@ phys_size_t initdram(int board_type)
 void board_add_ram_info(int use_default)
 {
 #if (CONFIG_NUM_DDR_CONTROLLERS > 1)
+#if defined(CONFIG_MPC85xx)
 	volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
+#elif defined(CONFIG_MPC86xx)
+	volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
+	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
+#endif
 #endif
 
 	puts(" (");